Searched refs:DPCSTX1_DPCSTX_INTERRUPT_CNTL__DPCS_TX0_FIFO_ERROR_MASK (Results 1 - 5 of 5) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_2_0_3_sh_mask.h568 #define DPCSTX1_DPCSTX_INTERRUPT_CNTL__DPCS_TX0_FIFO_ERROR_MASK 0x00000100L macro
H A Ddpcs_3_0_3_sh_mask.h655 #define DPCSTX1_DPCSTX_INTERRUPT_CNTL__DPCS_TX0_FIFO_ERROR_MASK 0x00000100L macro
H A Ddpcs_2_0_0_sh_mask.h702 #define DPCSTX1_DPCSTX_INTERRUPT_CNTL__DPCS_TX0_FIFO_ERROR_MASK 0x00000100L macro
H A Ddpcs_2_1_0_sh_mask.h753 #define DPCSTX1_DPCSTX_INTERRUPT_CNTL__DPCS_TX0_FIFO_ERROR_MASK 0x00000100L macro
H A Ddpcs_3_0_0_sh_mask.h655 #define DPCSTX1_DPCSTX_INTERRUPT_CNTL__DPCS_TX0_FIFO_ERROR_MASK 0x00000100L macro

Completed in 252 milliseconds