Searched refs:DPCSSYS_CR4_RAWLANE2_DIG_IRQ_CTL_DCC_ONDMD_IRQ__RESERVED_15_1__SHIFT (Results 1 - 3 of 3) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_4_2_0_sh_mask.h94668 #define DPCSSYS_CR4_RAWLANE2_DIG_IRQ_CTL_DCC_ONDMD_IRQ__RESERVED_15_1__SHIFT macro
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H A Ddpcs_4_2_2_sh_mask.h94888 #define DPCSSYS_CR4_RAWLANE2_DIG_IRQ_CTL_DCC_ONDMD_IRQ__RESERVED_15_1__SHIFT macro
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H A Ddpcs_4_2_3_sh_mask.h90229 #define DPCSSYS_CR4_RAWLANE2_DIG_IRQ_CTL_DCC_ONDMD_IRQ__RESERVED_15_1__SHIFT macro
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