Searched refs:DCN_1_0__SRCID__OTG3_EXT_TIMING_SYNC_INTERRUPT_CONTROL (Results 1 - 1 of 1) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/ivsrcid/dcn/
H A Dirqsrcs_dcn_1_0.h679 #define DCN_1_0__SRCID__OTG3_EXT_TIMING_SYNC_INTERRUPT_CONTROL 0x20 // D3 : OTG ext sync interrupt OTG3_IHC_EXT_TIMING_SYNC_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE3 Level / Pulse macro

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