Searched refs:DCIO_GSL_VSYNC_SEL_PIPE5 (Results 1 - 4 of 4) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_enum.h302 DCIO_GSL_VSYNC_SEL_PIPE5 = 0x5, enumerator in enum:DCIO_GSL_VSYNC_SEL
H A Ddce_11_0_enum.h1071 DCIO_GSL_VSYNC_SEL_PIPE5 = 0x5, enumerator in enum:DCIO_GSL_VSYNC_SEL
H A Ddce_11_2_enum.h1470 DCIO_GSL_VSYNC_SEL_PIPE5 = 0x5, enumerator in enum:DCIO_GSL_VSYNC_SEL
/openbsd-current/sys/dev/pci/drm/amd/include/
H A Dvega10_enum.h12009 DCIO_GSL_VSYNC_SEL_PIPE5 = 0x00000005, enumerator in enum:DCIO_GSL_VSYNC_SEL

Completed in 694 milliseconds