Searched refs:DCIO_GSL1_TIMING_SYNC_SEL_GENCLK_CLK (Results 1 - 4 of 4) sorted by relevance
| /openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dce/ | ||
| H A D | dce_10_0_enum.h | 321 DCIO_GSL1_TIMING_SYNC_SEL_GENCLK_CLK = 0x2, enumerator in enum:DCIO_GSL1_TIMING_SYNC_SEL |
| H A D | dce_11_0_enum.h | 1090 DCIO_GSL1_TIMING_SYNC_SEL_GENCLK_CLK = 0x2, enumerator in enum:DCIO_GSL1_TIMING_SYNC_SEL |
| H A D | dce_11_2_enum.h | 1489 DCIO_GSL1_TIMING_SYNC_SEL_GENCLK_CLK = 0x2, enumerator in enum:DCIO_GSL1_TIMING_SYNC_SEL |
| /openbsd-current/sys/dev/pci/drm/amd/include/ | ||
| H A D | vega10_enum.h | 12043 DCIO_GSL1_TIMING_SYNC_SEL_GENCLK_CLK = 0x00000002, enumerator in enum:DCIO_GSL1_TIMING_SYNC_SEL |
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