Searched refs:DCIO_GENLK_VSYNC_GSL_MASK_TIMING (Results 1 - 6 of 6) sorted by relevance
| /openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dce/ | ||
| H A D | dce_10_0_enum.h | 283 DCIO_GENLK_VSYNC_GSL_MASK_TIMING = 0x1, enumerator in enum:DCIO_GENLK_VSYNC_GSL_MASK |
| H A D | dce_11_0_enum.h | 1052 DCIO_GENLK_VSYNC_GSL_MASK_TIMING = 0x1, enumerator in enum:DCIO_GENLK_VSYNC_GSL_MASK |
| H A D | dce_11_2_enum.h | 1451 DCIO_GENLK_VSYNC_GSL_MASK_TIMING = 0x1, enumerator in enum:DCIO_GENLK_VSYNC_GSL_MASK |
| /openbsd-current/sys/dev/pci/drm/amd/include/ | ||
| H A D | vega10_enum.h | 11975 DCIO_GENLK_VSYNC_GSL_MASK_TIMING = 0x00000001, enumerator in enum:DCIO_GENLK_VSYNC_GSL_MASK |
| H A D | navi10_enum.h | 8384 DCIO_GENLK_VSYNC_GSL_MASK_TIMING = 0x00000001, enumerator in enum:DCIO_GENLK_VSYNC_GSL_MASK |
| H A D | soc21_enum.h | 9892 DCIO_GENLK_VSYNC_GSL_MASK_TIMING = 0x00000001, enumerator in enum:DCIO_GENLK_VSYNC_GSL_MASK |
Completed in 999 milliseconds