Searched refs:CM4_CM_POST_CSC_C21_C22__CM_POST_CSC_C22__SHIFT (Results 1 - 2 of 2) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_0_sh_mask.h23980 #define CM4_CM_POST_CSC_C21_C22__CM_POST_CSC_C22__SHIFT macro
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H A Ddcn_3_0_2_sh_mask.h22939 #define CM4_CM_POST_CSC_C21_C22__CM_POST_CSC_C22__SHIFT macro
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