Searched refs:CG_SPLL_FUNC_CNTL_3 (Results 1 - 19 of 19) sorted by relevance

/openbsd-current/sys/dev/pci/drm/radeon/
H A Drv740d.h37 #define CG_SPLL_FUNC_CNTL_3 0x608 macro
H A Drv730d.h40 #define CG_SPLL_FUNC_CNTL_3 0x608 macro
H A Drv740_dpm.c296 RREG32(CG_SPLL_FUNC_CNTL_3);
H A Drv730_dpm.c204 RREG32(CG_SPLL_FUNC_CNTL_3);
H A Drv770d.h104 #define CG_SPLL_FUNC_CNTL_3 0x608 macro
H A Dnid.h550 #define CG_SPLL_FUNC_CNTL_3 0x608 macro
H A Dcikd.h260 #define CG_SPLL_FUNC_CNTL_3 0xC0500148 macro
H A Dsid.h99 #define CG_SPLL_FUNC_CNTL_3 0x608 macro
H A Devergreend.h86 #define CG_SPLL_FUNC_CNTL_3 0x608 macro
H A Drv770_dpm.c1527 RREG32(CG_SPLL_FUNC_CNTL_3);
H A Dni_dpm.c1185 ni_pi->clock_registers.cg_spll_func_cntl_3 = RREG32(CG_SPLL_FUNC_CNTL_3);
H A Dci_dpm.c1842 RREG32_SMC(CG_SPLL_FUNC_CNTL_3);
H A Dsi_dpm.c3554 si_pi->clock_registers.cg_spll_func_cntl_3 = RREG32(CG_SPLL_FUNC_CNTL_3);
/openbsd-current/sys/dev/pci/drm/amd/pm/powerplay/smumgr/
H A Dfiji_smumgr.c891 spll_func_cntl_3 = PHM_SET_FIELD(spll_func_cntl_3, CG_SPLL_FUNC_CNTL_3,
895 spll_func_cntl_3 = PHM_SET_FIELD(spll_func_cntl_3, CG_SPLL_FUNC_CNTL_3,
H A Diceland_smumgr.c832 CG_SPLL_FUNC_CNTL_3, SPLL_FB_DIV, fbdiv);
836 CG_SPLL_FUNC_CNTL_3, SPLL_DITHEN, 1);
H A Dci_smumgr.c333 spll_func_cntl_3 = PHM_SET_FIELD(spll_func_cntl_3, CG_SPLL_FUNC_CNTL_3,
337 spll_func_cntl_3 = PHM_SET_FIELD(spll_func_cntl_3, CG_SPLL_FUNC_CNTL_3,
H A Dtonga_smumgr.c575 CG_SPLL_FUNC_CNTL_3, SPLL_FB_DIV, fbdiv);
579 CG_SPLL_FUNC_CNTL_3, SPLL_DITHEN, 1);
/openbsd-current/sys/dev/pci/drm/amd/amdgpu/
H A Dsid.h100 #define CG_SPLL_FUNC_CNTL_3 0x182 macro
/openbsd-current/sys/dev/pci/drm/amd/pm/legacy-dpm/
H A Damdgpu_si_dpm.c4028 si_pi->clock_registers.cg_spll_func_cntl_3 = RREG32(CG_SPLL_FUNC_CNTL_3);

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