Searched refs:CG_SPLL_FUNC_CNTL_2 (Results 1 - 22 of 22) sorted by relevance

/openbsd-current/sys/dev/pci/drm/radeon/
H A Drv740d.h34 #define CG_SPLL_FUNC_CNTL_2 0x604 macro
H A Drv730d.h37 #define CG_SPLL_FUNC_CNTL_2 0x604 macro
H A Drv740_dpm.c294 RREG32(CG_SPLL_FUNC_CNTL_2);
H A Drv730_dpm.c202 RREG32(CG_SPLL_FUNC_CNTL_2);
H A Drv770.c1142 tmp = RREG32(CG_SPLL_FUNC_CNTL_2);
1145 WREG32(CG_SPLL_FUNC_CNTL_2, tmp);
1154 WREG32(CG_SPLL_FUNC_CNTL_2, tmp);
H A Drv770d.h100 #define CG_SPLL_FUNC_CNTL_2 0x604 macro
H A Dnid.h547 #define CG_SPLL_FUNC_CNTL_2 0x604 macro
H A Dcikd.h257 #define CG_SPLL_FUNC_CNTL_2 0xC0500144 macro
H A Dsid.h94 #define CG_SPLL_FUNC_CNTL_2 0x604 macro
H A Dsi.c3994 tmp = RREG32(CG_SPLL_FUNC_CNTL_2);
3996 WREG32(CG_SPLL_FUNC_CNTL_2, tmp);
4004 tmp = RREG32(CG_SPLL_FUNC_CNTL_2);
4006 WREG32(CG_SPLL_FUNC_CNTL_2, tmp);
H A Devergreend.h82 #define CG_SPLL_FUNC_CNTL_2 0x604 macro
H A Drv770_dpm.c1525 RREG32(CG_SPLL_FUNC_CNTL_2);
H A Dni_dpm.c1184 ni_pi->clock_registers.cg_spll_func_cntl_2 = RREG32(CG_SPLL_FUNC_CNTL_2);
H A Dci_dpm.c1840 RREG32_SMC(CG_SPLL_FUNC_CNTL_2);
H A Dsi_dpm.c3553 si_pi->clock_registers.cg_spll_func_cntl_2 = RREG32(CG_SPLL_FUNC_CNTL_2);
/openbsd-current/sys/dev/pci/drm/amd/amdgpu/
H A Damdgpu_si.c1338 tmp = RREG32(CG_SPLL_FUNC_CNTL_2);
1340 WREG32(CG_SPLL_FUNC_CNTL_2, tmp);
1348 tmp = RREG32(CG_SPLL_FUNC_CNTL_2);
1350 WREG32(CG_SPLL_FUNC_CNTL_2, tmp);
H A Dsid.h95 #define CG_SPLL_FUNC_CNTL_2 0x181 macro
/openbsd-current/sys/dev/pci/drm/amd/pm/powerplay/smumgr/
H A Dfiji_smumgr.c1347 spll_func_cntl_2 = PHM_SET_FIELD(spll_func_cntl_2, CG_SPLL_FUNC_CNTL_2,
H A Diceland_smumgr.c1466 CG_SPLL_FUNC_CNTL_2, SCLK_MUX_SEL, 4);
H A Dci_smumgr.c1420 CG_SPLL_FUNC_CNTL_2, SCLK_MUX_SEL, 4);
H A Dtonga_smumgr.c1214 spll_func_cntl_2 = PHM_SET_FIELD(spll_func_cntl_2, CG_SPLL_FUNC_CNTL_2,
/openbsd-current/sys/dev/pci/drm/amd/pm/legacy-dpm/
H A Damdgpu_si_dpm.c4027 si_pi->clock_registers.cg_spll_func_cntl_2 = RREG32(CG_SPLL_FUNC_CNTL_2);

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