Searched refs:CG_DISPLAY_GAP_CNTL (Results 1 - 13 of 13) sorted by relevance
| /openbsd-current/sys/dev/pci/drm/radeon/ |
| H A D | rv6xxd.h | 130 #define CG_DISPLAY_GAP_CNTL 0x7dc macro
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| H A D | rv770_dpm.c | 881 u32 tmp = RREG32(CG_DISPLAY_GAP_CNTL);
886 WREG32(CG_DISPLAY_GAP_CNTL, tmp);
1345 u32 tmp = RREG32(CG_DISPLAY_GAP_CNTL);
1358 WREG32(CG_DISPLAY_GAP_CNTL, tmp);
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| H A D | cypress_dpm.c | 1733 u32 tmp = RREG32(CG_DISPLAY_GAP_CNTL);
1742 WREG32(CG_DISPLAY_GAP_CNTL, tmp);
1750 tmp = RREG32(CG_DISPLAY_GAP_CNTL) & ~(DISP1_GAP_MASK | DISP2_GAP_MASK);
1761 WREG32(CG_DISPLAY_GAP_CNTL, tmp);
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| H A D | rv6xx_dpm.c | 989 WREG32(CG_DISPLAY_GAP_CNTL, tmp);
1182 u32 tmp = RREG32(CG_DISPLAY_GAP_CNTL);
1195 WREG32(CG_DISPLAY_GAP_CNTL, tmp);
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| H A D | rv770d.h | 255 #define CG_DISPLAY_GAP_CNTL 0x714 macro
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| H A D | cikd.h | 129 #define CG_DISPLAY_GAP_CNTL 0xC0200060 macro
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| H A D | sid.h | 301 #define CG_DISPLAY_GAP_CNTL 0x828 macro
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| H A D | ci_dpm.c | 1950 u32 tmp = RREG32_SMC(CG_DISPLAY_GAP_CNTL);
1962 WREG32_SMC(CG_DISPLAY_GAP_CNTL, tmp);
2011 u32 tmp = RREG32_SMC(CG_DISPLAY_GAP_CNTL);
2017 WREG32_SMC(CG_DISPLAY_GAP_CNTL, tmp);
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| H A D | evergreend.h | 193 #define CG_DISPLAY_GAP_CNTL 0x714 macro
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| H A D | si_dpm.c | 3666 tmp = RREG32(CG_DISPLAY_GAP_CNTL) & ~(DISP1_GAP_MASK | DISP2_GAP_MASK);
3677 WREG32(CG_DISPLAY_GAP_CNTL, tmp);
3780 u32 tmp = RREG32(CG_DISPLAY_GAP_CNTL);
3789 WREG32(CG_DISPLAY_GAP_CNTL, tmp);
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| /openbsd-current/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ |
| H A D | smu7_hwmgr.c | 457 display_gap = PHM_SET_FIELD(display_gap, CG_DISPLAY_GAP_CNTL,
460 display_gap = PHM_SET_FIELD(display_gap, CG_DISPLAY_GAP_CNTL,
4582 display_gap = PHM_SET_FIELD(display_gap, CG_DISPLAY_GAP_CNTL, DISP_GAP, (hwmgr->display_config->num_display > 0) ? DISPLAY_GAP_VBLANK_OR_WM : DISPLAY_GAP_IGNORE);
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| /openbsd-current/sys/dev/pci/drm/amd/amdgpu/ |
| H A D | sid.h | 302 #define CG_DISPLAY_GAP_CNTL 0x20a macro
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| /openbsd-current/sys/dev/pci/drm/amd/pm/legacy-dpm/ |
| H A D | amdgpu_si_dpm.c | 4146 tmp = RREG32(CG_DISPLAY_GAP_CNTL) & ~(DISP1_GAP_MASK | DISP2_GAP_MASK);
4157 WREG32(CG_DISPLAY_GAP_CNTL, tmp);
4260 u32 tmp = RREG32(CG_DISPLAY_GAP_CNTL);
4269 WREG32(CG_DISPLAY_GAP_CNTL, tmp);
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