Searched refs:size_log2 (Results 1 - 5 of 5) sorted by relevance

/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/infiniband/hw/cxgb3/
H A Diwch_user.h51 __u32 size_log2; member in struct:iwch_create_cq_resp
58 __u32 size_log2; member in struct:iwch_create_qp_resp
H A Dcxio_wr.h44 #define Q_FULL(rptr,wptr,size_log2) ( (((wptr)-(rptr))>>(size_log2)) && \
46 #define Q_GENBIT(ptr,size_log2) (!(((ptr)>>size_log2)&0x1))
47 #define Q_FREECNT(rptr,wptr,size_log2) ((1UL<<size_log2)-((wptr)-(rptr)))
49 #define Q_PTR2IDX(ptr,size_log2) (ptr & ((1UL<<size_log2)-1))
613 u32 size_log2; /* total wq size */ member in struct:t3_wq
633 u32 size_log2; member in struct:t3_cq
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H A Dcxio_hal.c90 if (Q_PTR2IDX((cq->rptr), cq->size_log2) != ret) {
99 while (Q_PTR2IDX((rptr+1), cq->size_log2) != ret)
107 cqe = cq->queue + Q_PTR2IDX(rptr, cq->size_log2);
108 while (!CQ_VLD_ENTRY(rptr, cq->size_log2, cqe)) {
158 int size = (1UL << (cq->size_log2)) * sizeof(struct t3_cqe);
167 (1UL << (cq->size_log2)) *
178 setup.size = 1UL << cq->size_log2;
193 setup.size = 1UL << cq->size_log2;
271 int depth = 1UL << wq->size_log2;
322 (1UL << (cq->size_log2))
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H A Diwch_provider.c184 chp->cq.size_log2 = ilog2(entries);
191 chp->ibcq.cqe = (1 << chp->cq.size_log2) - 1;
206 uresp.size_log2 = chp->cq.size_log2;
218 mm->len = PAGE_ALIGN((1UL << uresp.size_log2) *
223 chp->cq.cqid, chp, (1 << chp->cq.size_log2),
243 newcq.size_log2 = ilog2(cqe);
262 memcpy(newcq.queue, chp->cq.queue, (1 << chp->cq.size_log2) *
276 chp->ibcq.cqe = (1<<chp->cq.size_log2) - 1;
812 qhp->wq.size_log2
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H A Diwch_qp.c266 idx = Q_PTR2IDX(qhp->wq.wptr, qhp->wq.size_log2);
315 Q_GENBIT(qhp->wq.wptr, qhp->wq.size_log2),
354 idx = Q_PTR2IDX(qhp->wq.wptr, qhp->wq.size_log2);
367 Q_GENBIT(qhp->wq.wptr, qhp->wq.size_log2),
415 idx = Q_PTR2IDX(qhp->wq.wptr, qhp->wq.size_log2);
452 Q_GENBIT(qhp->wq.wptr, qhp->wq.size_log2), 0,
709 init_attr.qp_dma_size = (1UL << qhp->wq.size_log2);

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