/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-parisc/ |
H A D | asmregs.h | 24 rp: .reg %r2 25 arg3: .reg %r23 26 arg2: .reg %r24 27 arg1: .reg %r25 28 arg0: .reg %r26 29 dp: .reg %r27 30 ret0: .reg %r28 31 ret1: .reg %r29 32 sl: .reg %r29 33 sp: .reg [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm/ |
H A D | asmmacro.h | 24 .macro local_irq_enable reg=t0 25 mfc0 \reg, CP0_TCSTATUS 26 ori \reg, \reg, TCSTATUS_IXMT variable 27 xori \reg, \reg, TCSTATUS_IXMT variable 28 mtc0 \reg, CP0_TCSTATUS variable 32 .macro local_irq_disable reg=t0 33 mfc0 \reg, CP0_TCSTATUS 34 ori \reg, \re variable 35 mtc0 \\reg, CP0_TCSTATUS variable [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-mips/ |
H A D | asmmacro.h | 24 .macro local_irq_enable reg=t0 25 mfc0 \reg, CP0_TCSTATUS 26 ori \reg, \reg, TCSTATUS_IXMT variable 27 xori \reg, \reg, TCSTATUS_IXMT variable 28 mtc0 \reg, CP0_TCSTATUS variable 32 .macro local_irq_disable reg=t0 33 mfc0 \reg, CP0_TCSTATUS 34 ori \reg, \re variable 35 mtc0 \\reg, CP0_TCSTATUS variable [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm/mach-ip22/ |
H A D | ds1286.h | 15 #define rtc_read(reg) (hpc3c0->rtcregs[(reg)] & 0xff) 16 #define rtc_write(data, reg) do { hpc3c0->rtcregs[(reg)] = (data); } while(0)
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-mips/mach-ip22/ |
H A D | ds1286.h | 15 #define rtc_read(reg) (hpc3c0->rtcregs[(reg)] & 0xff) 16 #define rtc_write(data, reg) do { hpc3c0->rtcregs[(reg)] = (data); } while(0)
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/scsi/ |
H A D | dtc.h | 59 #define DTC_address(reg) (base + DTC_5380_OFFSET + reg) 61 #define dbNCR5380_read(reg) \ 62 (rval=readb(DTC_address(reg)), \ 64 , (reg), DTC_address(reg), rval)), rval ) ) 66 #define dbNCR5380_write(reg, value) do { \ 68 (value), (reg), DTC_address(reg)); \ 69 writeb(value, DTC_address(reg));} whil [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/arch-ixp23xx/ |
H A D | platform.h | 17 extern inline unsigned long ixp2000_reg_read(volatile void *reg) argument 19 return *((volatile unsigned long *)reg); 22 extern inline void ixp2000_reg_write(volatile void *reg, unsigned long val) argument 24 *((volatile unsigned long *)reg) = val; 27 extern inline void ixp2000_reg_wrb(volatile void *reg, unsigned long val) argument 29 *((volatile unsigned long *)reg) = val;
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/m32r/kernel/ |
H A D | entry.S | 83 #define R4(reg) @reg 84 #define R5(reg) @(0x04,reg) 85 #define R6(reg) @(0x08,reg) 86 #define PTREGS(reg) @(0x0C,reg) 87 #define R0(reg) @(0x10,reg) [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-sparc/ |
H A D | kgdb.h | 54 #define SAVE_KGDB_GLOBALS(reg) \ 55 std %g0, [%reg + STACKFRAME_SZ + KGDB_G0]; \ 56 std %g2, [%reg + STACKFRAME_SZ + KGDB_G2]; \ 57 std %g4, [%reg + STACKFRAME_SZ + KGDB_G4]; \ 58 std %g6, [%reg + STACKFRAME_SZ + KGDB_G6]; 60 #define SAVE_KGDB_INS(reg) \ 61 std %i0, [%reg + STACKFRAME_SZ + KGDB_I0]; \ 62 std %i2, [%reg + STACKFRAME_SZ + KGDB_I2]; \ 63 std %i4, [%reg + STACKFRAME_SZ + KGDB_I4]; \ 64 std %i6, [%reg [all...] |
H A D | asmmacro.h | 12 #define GET_PROCESSOR4M_ID(reg) \ 13 rd %tbr, %reg; \ 14 srl %reg, 12, %reg; \ 15 and %reg, 3, %reg; 17 #define GET_PROCESSOR4D_ID(reg) \ 18 lda [%g0] ASI_M_VIKING_TMP1, %reg;
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/net/e1000/ |
H A D | e1000_osdep.h | 65 #define E1000_WRITE_REG(a, reg, value) ( \ 67 (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg)))) 69 #define E1000_READ_REG(a, reg) ( \ 71 (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg))) 73 #define E1000_WRITE_REG_ARRAY(a, reg, offset, value) ( \ 75 (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \ 78 #define E1000_READ_REG_ARRAY(a, reg, offse [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-cris/arch-v32/hwregs/iop/ |
H A D | iop_version_defs.h | 18 #define REG_RD( scope, inst, reg ) \ 19 REG_READ( reg_##scope##_##reg, \ 20 (inst) + REG_RD_ADDR_##scope##_##reg ) 24 #define REG_WR( scope, inst, reg, val ) \ 25 REG_WRITE( reg_##scope##_##reg, \ 26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) ) 30 #define REG_RD_VECT( scope, inst, reg, index ) \ 31 REG_READ( reg_##scope##_##reg, \ 32 (inst) + REG_RD_ADDR_##scope##_##reg + \ 33 (index) * STRIDE_##scope##_##reg ) [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-cris/arch-v32/hwregs/ |
H A D | irq_nmi_defs.h | 18 #define REG_RD( scope, inst, reg ) \ 19 REG_READ( reg_##scope##_##reg, \ 20 (inst) + REG_RD_ADDR_##scope##_##reg ) 24 #define REG_WR( scope, inst, reg, val ) \ 25 REG_WRITE( reg_##scope##_##reg, \ 26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) ) 30 #define REG_RD_VECT( scope, inst, reg, index ) \ 31 REG_READ( reg_##scope##_##reg, \ 32 (inst) + REG_RD_ADDR_##scope##_##reg + \ 33 (index) * STRIDE_##scope##_##reg ) [all...] |
H A D | strcop_defs.h | 18 #define REG_RD( scope, inst, reg ) \ 19 REG_READ( reg_##scope##_##reg, \ 20 (inst) + REG_RD_ADDR_##scope##_##reg ) 24 #define REG_WR( scope, inst, reg, val ) \ 25 REG_WRITE( reg_##scope##_##reg, \ 26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) ) 30 #define REG_RD_VECT( scope, inst, reg, index ) \ 31 REG_READ( reg_##scope##_##reg, \ 32 (inst) + REG_RD_ADDR_##scope##_##reg + \ 33 (index) * STRIDE_##scope##_##reg ) [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/ap/gpl/minidlna/ffmpeg-0.5.1/libavcodec/x86/ |
H A D | mmx.h | 27 #define mmx_i2r(op,imm,reg) \ 28 __asm__ volatile (#op " %0, %%" #reg \ 32 #define mmx_m2r(op,mem,reg) \ 33 __asm__ volatile (#op " %0, %%" #reg \ 37 #define mmx_r2m(op,reg,mem) \ 38 __asm__ volatile (#op " %%" #reg ", %0" \ 48 #define movd_m2r(var,reg) mmx_m2r (movd, var, reg) 49 #define movd_r2m(reg,var) mmx_r2m (movd, reg, va [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/mips/qemu/ |
H A D | q-reset.c | 9 volatile unsigned int *reg = (unsigned int *)QEMU_RESTART_REG; local 15 *reg = 42; 22 volatile unsigned int *reg = (unsigned int *)QEMU_HALT_REG; local 24 *reg = 42;
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm/dec/ |
H A D | ioasic.h | 24 static inline void ioasic_write(unsigned int reg, u32 v) argument 26 ioasic_base[reg / 4] = v; 29 static inline u32 ioasic_read(unsigned int reg) argument 31 return ioasic_base[reg / 4];
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-cris/ |
H A D | etraxi2c.h | 16 #define I2C_WRITEARG(slave, reg, value) (((slave) << 16) | ((reg) << 8) | (value)) 17 #define I2C_READARG(slave, reg) (((slave) << 16) | ((reg) << 8)) 29 i2c_arg = I2C_WRITEARG(STA013_WRITE_ADDR, reg, val); 32 i2c_arg = I2C_READARG(STA013_READ_ADDR, reg);
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-mips/dec/ |
H A D | ioasic.h | 24 static inline void ioasic_write(unsigned int reg, u32 v) argument 26 ioasic_base[reg / 4] = v; 29 static inline u32 ioasic_read(unsigned int reg) argument 31 return ioasic_base[reg / 4];
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-v850/ |
H A D | current.h | 34 #define GET_CURRENT_TASK(reg) \ 35 GET_CURRENT_THREAD(reg); \ 36 ld.w TI_TASK[reg], reg
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-xtensa/ |
H A D | current.h | 31 #define GET_CURRENT(reg,sp) \ 32 GET_THREAD_INFO(reg,sp); \ 33 l32i reg, reg, TI_TASK \
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/arch-iop32x/ |
H A D | iop32x.h | 22 #define IOP3XX_GPIO_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07c4 + (reg)) 23 #define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07e0 + (reg))
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/arch-ns9xxx/ |
H A D | system.h | 25 u32 reg; local 27 reg = SYS_PLL >> 16; 28 REGSET(reg, SYS_PLL, SWC, YES); 29 SYS_PLL = reg;
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/arch-l7200/ |
H A D | pmu.h | 21 #define PMU_START (IO_START + PMU_OFF) /* Physical addr. of the PMU reg. */ 22 #define PMU_BASE (IO_BASE + PMU_OFF) /* Virtual addr. of the PMU reg. */ 41 #define GET_TRANSOP(reg) ((reg >> 25) & 0x03) /* Bits 26-25 */ 42 #define GET_OSCEN(reg) ((reg >> 16) & 0x01) 43 #define GET_OSCMUX(reg) ((reg >> 15) & 0x01) 44 #define GET_PLLMUL(reg) ((reg >> [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/video/riva/ |
H A D | nvreg.h | 44 #define DEVICE_ACCESS(device,reg) \ 45 nvCONTROL[(NV_##device##_##reg)/4] 47 #define DEVICE_WRITE(device,reg,value) DEVICE_ACCESS(device,reg)=(value) 48 #define DEVICE_READ(device,reg) DEVICE_ACCESS(device,reg) 49 #define DEVICE_PRINT(device,reg) \ 50 ErrorF("NV_"#device"_"#reg"=#%08lx\n",DEVICE_ACCESS(device,reg)) 56 #define PDAC_Write(reg,valu [all...] |