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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/ia64/scripts/
H A Dcheck-serialize.S2 .serialize.instruction
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/m68k/fpsp040/
H A Dsmovecr.S5 | offset given in the instruction field.
7 | Input: An offset in the instruction word.
H A Dbugfix.S65 | /* If the xu instruction is exceptional, we punt.
114 | /* If the xu instruction is exceptional, we punt.
247 | dest and the dest of the xu. We must clear the instruction in
248 | the cu and restore the state, allowing the instruction in the
249 | xu to complete. Remember, the instruction in the nu
251 | If the result of the xu instruction is not exceptional, we can
252 | restore the instruction from the cu to the frame and continue
275 | Check if the instruction which just completed was exceptional.
280 | It is necessary to isolate the result of the instruction in the
369 | dest and the dest of the xu. We must clear the instruction i
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/ppc/xmon/
H A Dppc.h80 /* A macro to extract the major opcode from an instruction. */
91 /* How far the operand is left shifted in the instruction. */
95 operand value into an instruction, check this field.
99 (i is the instruction which we are filling in, o is a pointer to
104 instruction and the operand value. It will return the new value
105 of the instruction. If the ERRMSG argument is not NULL, then if
110 unsigned long (*insert) PARAMS ((unsigned long instruction, long op,
114 extract this operand type from an instruction, check this field.
121 (i is the instruction, o is a pointer to this structure, and op
125 instruction valu
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/sh/kernel/
H A Dtraps.c150 * handle an instruction that does an unaligned memory access by emulating the
152 * - note that PC _may not_ point to the faulting instruction
153 * (if that instruction is in a branch delay slot)
156 static int handle_unaligned_ins(u16 instruction, struct pt_regs *regs) argument
162 index = (instruction>>8)&15; /* 0x0F00 */
165 index = (instruction>>4)&15; /* 0x00F0 */
168 count = 1<<(instruction&3);
171 switch (instruction>>12) {
173 if (instruction & 8) {
217 dst += (instruction
336 u16 instruction; local
370 handle_unaligned_access(u16 instruction, struct pt_regs *regs) argument
536 u16 instruction; local
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/mips/dec/prom/
H A Dlocore.S26 addiu k0, 4 # skip the causing instruction
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/nwfpe/
H A Dentry26.S37 If the emulator is unable to emulate the instruction, it returns to
51 3) It calls EmulateAll to emulate a floating point instruction.
54 4) If an instruction has been emulated successfully, it looks ahead at
55 the next instruction. If it is a floating point instruction, it
56 executes the instruction, without returning to user space. In this
58 until it encounters a non floating point instruction, at which time it
71 ldr r0, [r5, #-4] @ get actual instruction into r0
72 bl EmulateAll @ emulate the instruction
77 .Lx1: ldrt r6, [r5], #4 @ get the next instruction an
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H A Dentry.S27 ldrt r0, [r4] @ r0 = instruction
42 the user code. If the emulator is unable to emulate the instruction,
58 2) It calls EmulateAll to emulate a floating point instruction.
61 3) If an instruction has been emulated successfully, it looks ahead at
62 the next instruction. If it is a floating point instruction, it
63 executes the instruction, without returning to user space. In this
65 until it encounters a non floating point instruction, at which time it
80 bl EmulateAll @ emulate the instruction
85 .Lx1: ldrt r6, [r5], #4 @ get the next instruction an
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm26/nwfpe/
H A Dentry.S37 If the emulator is unable to emulate the instruction, it returns to
51 3) It calls EmulateAll to emulate a floating point instruction.
54 4) If an instruction has been emulated successfully, it looks ahead at
55 the next instruction. If it is a floating point instruction, it
56 executes the instruction, without returning to user space. In this
58 until it encounters a non floating point instruction, at which time it
73 ldr r0, [r5, #-4] @ get actual instruction into r0
74 bl EmulateAll @ emulate the instruction
79 .Lx1: ldrt r6, [r5], #4 @ get the next instruction an
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/powerpc/xmon/
H A Dppc.h122 /* Opcode is an e500 SPE floating point instruction. */
149 /* A macro to extract the major opcode from an instruction. */
160 /* How far the operand is left shifted in the instruction. */
164 operand value into an instruction, check this field.
168 (i is the instruction which we are filling in, o is a pointer to
173 instruction and the operand value. It will return the new value
174 of the instruction. If the ERRMSG argument is not NULL, then if
180 (unsigned long instruction, long op, int dialect, const char **errmsg);
183 extract this operand type from an instruction, check this field.
190 (i is the instruction,
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mm/
H A Dabort-ev4.S6 * Params : r2 = address of aborted instruction
15 * Purpose : obtain information about current aborted instruction.
24 ldr r3, [r2] @ read aborted ARM instruction
H A Dabort-ev4t.S7 * Params : r2 = address of aborted instruction
16 * Purpose : obtain information about current aborted instruction.
26 ldreq r3, [r2] @ read aborted ARM instruction
H A Dabort-ev5t.S7 * Params : r2 = address of aborted instruction
16 * Purpose : obtain information about current aborted instruction.
26 ldreq r3, [r2] @ read aborted ARM instruction
H A Dabort-ev5tj.S7 * Params : r2 = address of aborted instruction
16 * Purpose : obtain information about current aborted instruction.
29 ldreq r3, [r2] @ read aborted ARM instruction
H A Dabort-macro.S3 * differently than every other instruction, so it is set to 0 (write)
15 ldrh r3, [r2] @ Read aborted Thumb instruction
H A Dabort-ev6.S7 * Params : r2 = address of aborted instruction
16 * Purpose : obtain information about current aborted instruction.
31 * Faulty SWP instruction on 1136 doesn't set bit 11 in DFSR.
38 ldreq r3, [r2] @ read aborted ARM instruction
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/scsi/aic7xxx_old/
H A Dsequencer.h106 struct instruction { struct
111 struct instruction *stqe_next;
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/scsi/aic7xxx/aicasm/
H A Daicasm.h92 struct instruction *seq_alloc(void);
H A Daicasm_insformat.h167 struct instruction { struct
171 STAILQ_ENTRY(instruction) links;
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/s390/kernel/
H A Dhead31.S66 efpc %r0,0 # test IEEE extract fpc instruction
71 # find out if we have the CSP instruction
77 csp %r0,%r2 # Test CSP instruction
82 # find out if we have the MVPG instruction
88 mvpg %r1,%r2 # Test CSP instruction
93 # find out if we have the IDTE instruction
122 .long 0 # cr3: instruction authorization
123 .long 0 # cr4: instruction authorization
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/frv/kernel/
H A Dcmode.S80 # (4) Preload a series of following instructions to the instruction
103 # (5) Flush the content of all caches by the DCEF instruction.
115 # (8) Execute memory barrier instruction (MEMBAR).
124 # (10) Execute memory barrier instruction (MEMBAR).
134 # (13) Execute the instruction just after the memory barrier
135 # instruction that executes the self-loop 256 times. (Meanwhile,
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm26/lib/
H A Dbacktrace.S40 2: stmfd sp!, {pc} @ calculate offset of PC in STMIA instruction
53 1004: ldr r1, [save, #0] @ get instruction at function
65 1005: ldr r1, [save, #4] @ get instruction at function+4
69 addeq save, save, #4 @ next instruction
73 1006: ldr r1, [save, #4] @ Get 'stmia sp!, {rlist, fp, ip, lr, pc}' instruction
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/s390/mm/
H A Dfault.c255 u16 instruction; local
262 rc = __get_user(instruction, (u16 __user *) regs->psw.addr);
271 if (compat && instruction == 0x0a77)
273 else if (compat && instruction == 0x0aad)
277 if (instruction == 0x0a77)
279 else if (instruction == 0x0aad)
400 * The instruction that caused the program check will
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/m68k/ifpsp060/src/
H A Disp.S337 # _imem_read_{word,long}() - read instruction word/longword #
366 # This handler fetches the first instruction longword from #
426 mov.l EXC_EXTWPTR(%a6),%a0 # fetch instruction addr
427 addq.l &0x4,EXC_EXTWPTR(%a6) # incr instruction ptr
549 mov.l EXC_EXTWPTR(%a6),%a0 # fetch instruction addr
550 addq.l &0x2,EXC_EXTWPTR(%a6) # incr instruction ptr
599 # The instruction that was just emulated was also being traced. The trace
600 # trap for this instruction will be lost unless we jump to the trace handler.
648 # the chk2 instruction should take a chk trap. so, here we must create a
649 # chk stack frame from an unimplemented integer instruction exceptio
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-s390/
H A Dkprobes.h41 /* Maximum instruction size is 3 (16bit) halfwords: */
61 /* Architecture specific copy of original instruction */
63 /* copy of original instruction */
97 int is_prohibited_opcode(kprobe_opcode_t *instruction);

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