Searched refs:dpll (Results 1 - 6 of 6) sorted by relevance

/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/plat-omap/
H A Dsram-fn.S35 strh r0, [r2] @ set dpll into bypass mode
40 strh r0, [r2] @ write new dpll value
48 lock: ldrh r4, [r2], #0 @ read back dpll value
51 tst r4, #1 << 0 @ dpll rate locked?
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/video/intelfb/
H A Dintelfbhw.c625 intelfbhw_get_p1p2(struct intelfb_info *dinfo, int dpll, int *o_p1, int *o_p2) argument
630 if (dpll & DPLL_P1_FORCE_DIV2)
633 p1 = (dpll >> DPLL_P1_SHIFT) & 0xff;
637 p2 = (dpll >> DPLL_I9XX_P2_SHIFT) & DPLL_P2_MASK;
639 if (dpll & DPLL_P1_FORCE_DIV2)
642 p1 = (dpll >> DPLL_P1_SHIFT) & DPLL_P1_MASK;
643 p2 = (dpll >> DPLL_P2_SHIFT) & DPLL_P2_MASK;
980 u32 *dpll, *fp0, *fp1; local
1001 dpll = &hw->dpll_b;
1013 dpll
1218 const u32 *dpll, *fp0, *fp1, *pipe_conf; local
[all...]
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/ata/
H A Dpata_hpt3x2n.c329 int dpll = hpt3x2n_use_dpll(ap, (tf->flags & ATA_TFLAG_WRITE)); local
330 if ((flags & USE_DPLL) != dpll) {
331 if (dpll == 1)
H A Dpata_hpt37x.c1086 int dpll, adjust; local
1089 dpll = 2;
1091 dpll = 3;
1093 f_low = (MHz[clock_slot] * 48) / MHz[dpll];
1116 if (dpll == 3)
1121 printk(KERN_INFO "hpt37x: Bus clock %dMHz, using DPLL.\n", MHz[dpll]);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-omap2/
H A Dsram-fn.S267 /* set new dpll dividers _after_ in bypass */
269 str r0, [r4] @ set dpll ctrl val
282 beq pend @ jump over dpll relock
287 orr r8, r7, #0x3 @ val for lock dpll
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/ide/pci/
H A Dhpt366.c852 u32 dpll = (f_high << 16) | f_low | 0x100; local
856 pci_write_config_dword(dev, 0x5c, dpll);
873 pci_read_config_dword (dev, 0x5c, &dpll);
874 pci_write_config_dword(dev, 0x5c, (dpll & ~0x100));

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