Searched refs:clkp (Results 1 - 12 of 12) sorted by relevance

/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-s3c2410/
H A Dclock.c215 struct clk *clkp; local
227 clkp = init_clocks;
228 for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++, clkp++) {
231 clkp->usage = clkcon & clkp->ctrlbit ? 1 : 0;
233 ret = s3c24xx_register_clock(clkp);
236 clkp->name, ret);
252 clkp = init_clocks_disable;
253 for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
255 ret = s3c24xx_register_clock(clkp);
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/sh/kernel/cpu/sh4a/
H A Dclock-sh7780.c105 struct clk *clkp = sh7780_onchip_clocks[i]; local
107 clkp->parent = clk;
108 clk_register(clkp);
109 clk_enable(clkp);
H A Dclock-sh7785.c143 struct clk *clkp = sh7785_onchip_clocks[i]; local
145 clkp->parent = clk;
146 clk_register(clkp);
147 clk_enable(clkp);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/sh/kernel/cpu/sh4/
H A Dclock-sh4-202.c159 struct clk *clkp = sh4202_onchip_clocks[i]; local
161 clkp->parent = clk;
162 clk_register(clkp);
163 clk_enable(clkp);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/sh/kernel/cpu/
H A Dclock.c79 struct clk *clkp; local
81 list_for_each_entry(clkp, &clock_list, node) {
82 if (likely(clkp->parent != clk))
84 if (likely(clkp->ops && clkp->ops->recalc))
85 clkp->ops->recalc(clkp);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-s3c2412/
H A Dclock.c638 struct clk *clkp; local
649 clkp = clks[ptr];
651 ret = s3c24xx_register_clock(clkp);
654 clkp->name, ret);
678 clkp = init_clocks;
679 for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++, clkp++) {
682 clkp->usage = clkcon & clkp->ctrlbit ? 1 : 0;
684 ret = s3c24xx_register_clock(clkp);
687 clkp
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-pnx4008/
H A Dclock.c858 struct clk **clkp; local
861 for (clkp = onchip_clks; clkp < onchip_clks + ARRAY_SIZE(onchip_clks);
862 clkp++) {
863 if (strcmp(id, (*clkp)->name) == 0
864 && try_module_get((*clkp)->owner)) {
865 clk = (*clkp);
949 struct clk **clkp; local
954 for (clkp = onchip_clks; clkp < onchip_clk
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-s3c2443/
H A Dclock.c943 struct clk *clkp; local
964 clkp = clks[ptr];
966 ret = s3c24xx_register_clock(clkp);
969 clkp->name, ret);
991 clkp = init_clocks;
992 for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++, clkp++) {
993 ret = s3c24xx_register_clock(clkp);
996 clkp->name, ret);
1012 clkp = init_clocks_disable;
1013 for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-omap1/
H A Dclock.c645 struct clk ** clkp; local
668 for (clkp = onchip_clks; clkp < onchip_clks+ARRAY_SIZE(onchip_clks); clkp++) {
669 if (((*clkp)->flags &CLOCK_IN_OMAP1510) && cpu_is_omap1510()) {
670 clk_register(*clkp);
674 if (((*clkp)->flags &CLOCK_IN_OMAP16XX) && cpu_is_omap16xx()) {
675 clk_register(*clkp);
679 if (((*clkp)->flags &CLOCK_IN_OMAP730) && cpu_is_omap730()) {
680 clk_register(*clkp);
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/plat-omap/
H A Dclock.c294 struct clk *clkp; local
299 list_for_each_entry(clkp, &clocks, node) {
300 if (likely(clkp->parent != tclk))
302 if (likely((u32)clkp->recalc))
303 clkp->recalc(clkp);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-omap2/
H A Dclock.c1117 struct clk ** clkp; local
1123 for (clkp = onchip_clks; clkp < onchip_clks + ARRAY_SIZE(onchip_clks);
1124 clkp++) {
1126 if ((*clkp)->flags & CLOCK_IN_OMAP242X && cpu_is_omap2420()) {
1127 clk_register(*clkp);
1131 if ((*clkp)->flags & CLOCK_IN_OMAP243X && cpu_is_omap2430()) {
1132 clk_register(*clkp);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/serial/
H A Ds3c2410.c633 struct s3c24xx_uart_clksrc *clkp; local
638 clkp = cfg->clocks;
643 clkp = &tmp_clksrc;
649 if (strcmp(clkp->name, "fclk") == 0) {
658 if (strcmp(src.name, clkp->name) == 0) {
659 s3c24xx_serial_setsource(port, clkp);
663 clkp->divisor = src.divisor;
666 s3c24xx_serial_calcbaud(res, port, clkp, baud);
672 for (i = 0; i < cfg->clocks_size; i++, clkp++) {
673 if (s3c24xx_serial_calcbaud(resptr, port, clkp, bau
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