Searched refs:clk_mpll (Results 1 - 4 of 4) sorted by relevance

/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/plat-s3c24xx/
H A Dclock.h45 extern struct clk clk_mpll;
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/plat-s3c24xx/
H A Dclock.c224 struct clk clk_mpll = { variable in typeref:struct:clk
240 .parent = &clk_mpll,
433 clk_mpll.rate = fclk;
445 if (s3c24xx_register_clock(&clk_mpll) < 0)
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-s3c2412/
H A Dclock.c268 else if (parent == &clk_mpll)
319 else if (parent == &clk_mpll)
574 .src_1 = &clk_mpll,
584 .src_1 = &clk_mpll,
589 .src_1 = &clk_mpll,
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-s3c2443/
H A Dclock.c225 if (parent == &clk_mpll)
876 parent = &clk_mpll;

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