Searched refs:TxAvailable (Results 1 - 5 of 5) sorted by relevance

/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/net/pcmcia/
H A D3c589_cs.c83 TxAvailable = 0x0008, RxComplete = 0x0010, RxEarly = 0x0020, enumerator in enum:c509status
495 outw(AckIntr | IntLatch | TxAvailable | RxEarly | IntReq,
497 outw(SetIntrEnb | IntLatch | TxAvailable | RxComplete | StatsFull
668 if (status & TxAvailable) {
671 outw(AckIntr | TxAvailable, ioaddr + EL3_CMD);
H A D3c574_cs.c158 TxAvailable = 0x0008, RxComplete = 0x0010, RxEarly = 0x0020, enumerator in enum:elxl_status
708 outw(AckIntr | IntLatch | TxAvailable | RxEarly | IntReq,
710 outw(SetIntrEnb | IntLatch | TxAvailable | RxComplete | StatsFull
839 if (status & TxAvailable) {
842 outw(AckIntr | TxAvailable, ioaddr + EL3_CMD);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/net/
H A D3c515.c207 TxAvailable = 0x0008, RxComplete = 0x0010, RxEarly = 0x0020, enumerator in enum:corkscrew_status
846 (vp->full_bus_master_tx ? DownComplete : TxAvailable) |
850 outw(AckIntr | IntLatch | TxAvailable | RxEarly | IntReq,
852 outw(SetIntrEnb | IntLatch | TxAvailable | RxComplete | StatsFull
1157 if (status & TxAvailable) {
1161 outw(AckIntr | TxAvailable, ioaddr + EL3_CMD);
1219 outw(SetIntrEnb | TxAvailable |
H A D3c509.c86 TxAvailable = 0x0008, RxComplete = 0x0010, RxEarly = 0x0020, enumerator in enum:c509status
858 if (status & TxAvailable) {
862 outw(AckIntr | TxAvailable, ioaddr + EL3_CMD);
1376 outw(AckIntr | IntLatch | TxAvailable | RxEarly | IntReq,
1378 outw(SetIntrEnb | IntLatch|TxAvailable|TxComplete|RxComplete|StatsFull,
H A D3c59x.c455 TxAvailable = 0x0008, RxComplete = 0x0010, RxEarly = 0x0020, enumerator in enum:vortex_status
1638 (vp->full_bus_master_tx ? DownComplete : TxAvailable) |
1641 vp->intr_enable = SetIntrEnb | IntLatch | TxAvailable |
1647 iowrite16(AckIntr | IntLatch | TxAvailable | RxEarly | IntReq,
2184 if (status & TxAvailable) {
2188 iowrite16(AckIntr | TxAvailable, ioaddr + EL3_CMD);

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