Searched refs:TIMER0_VA_BASE (Results 1 - 3 of 3) sorted by relevance
| /netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-realview/ |
| H A D | core.c | 464 #define TIMER0_VA_BASE __io_address(REALVIEW_TIMER0_1_BASE) macro
501 ticks2 = readl(TIMER0_VA_BASE + TIMER_VALUE) & 0xffff;
506 ticks2 = readl(TIMER0_VA_BASE + TIMER_VALUE) & 0xffff;
531 writel(1, TIMER0_VA_BASE + TIMER_INTCLR);
573 writel(0, TIMER0_VA_BASE + TIMER_CTRL);
578 writel(TIMER_RELOAD, TIMER0_VA_BASE + TIMER_LOAD);
579 writel(TIMER_RELOAD, TIMER0_VA_BASE + TIMER_VALUE);
581 TIMER_CTRL_IE, TIMER0_VA_BASE + TIMER_CTRL);
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| /netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-versatile/ |
| H A D | core.c | 778 #define TIMER0_VA_BASE __io_address(VERSATILE_TIMER0_1_BASE) macro
809 writel(TIMER_RELOAD, TIMER0_VA_BASE + TIMER_LOAD);
825 writel(ctrl, TIMER0_VA_BASE + TIMER_CTRL);
831 unsigned long ctrl = readl(TIMER0_VA_BASE + TIMER_CTRL);
833 writel(evt, TIMER0_VA_BASE + TIMER_LOAD);
834 writel(ctrl | TIMER_CTRL_ENABLE, TIMER0_VA_BASE + TIMER_CTRL);
854 writel(1, TIMER0_VA_BASE + TIMER_INTCLR);
919 writel(0, TIMER0_VA_BASE + TIMER_CTRL);
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| /netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-integrator/ |
| H A D | core.c | 190 #define TIMER0_VA_BASE (IO_ADDRESS(INTEGRATOR_CT_BASE)+0x00000000) macro
294 writel(0, TIMER0_VA_BASE + TIMER_CTRL);
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