Searched refs:S3C2443_CLKDIV0_HALF_PCLK (Results 1 - 2 of 2) sorted by relevance

/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/arch-s3c2410/
H A Dregs-s3c2443-clock.h63 #define S3C2443_CLKDIV0_HALF_PCLK (1<<2) macro
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-s3c2443/
H A Dclock.c952 pclk = hclk / ((clkdiv0 & S3C2443_CLKDIV0_HALF_PCLK) ? 2 : 1);

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