Searched refs:RTC_REG_A (Results 1 - 6 of 6) sorted by relevance

/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/mips/sgi-ip32/
H A Dip32-reset.c59 reg_a = CMOS_READ(RTC_REG_A);
65 CMOS_WRITE(reg_a | DS_REGA_DV0, RTC_REG_A);
75 CMOS_WRITE(reg_a, RTC_REG_A);
97 CMOS_WRITE(reg_a | DS_REGA_DV0, RTC_REG_A);
107 CMOS_WRITE(reg_a & ~DS_REGA_DV0, RTC_REG_A);
110 CMOS_WRITE(reg_a & ~DS_REGA_DV0, RTC_REG_A);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/linux/
H A Dmc146818rtc.h59 #define RTC_REG_A 10 macro
67 #define RTC_FREQ_SELECT RTC_REG_A
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/mips/mips-boards/generic/
H A Dtime.c195 while (CMOS_READ(RTC_REG_A) & RTC_UIP);
196 while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
202 while (CMOS_READ(RTC_REG_A) & RTC_UIP);
203 while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-footbridge/
H A Dtime.c138 CMOS_WRITE(RTC_REF_CLCK_32KHZ, RTC_REG_A);
148 if ((CMOS_READ(RTC_REG_A) & 0x7f) == RTC_REF_CLCK_32KHZ &&
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/sh/boards/snapgear/
H A Drtc.c272 case RTC_REG_A: /* RTC_FREQ_SELECT */ break;
300 case RTC_REG_A: /* RTC_FREQ_SELECT */ break;
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/mips/dec/
H A Dtime.c177 CMOS_WRITE(RTC_REF_CLCK_32KHZ | (16 - __ffs(HZ)), RTC_REG_A);

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