Searched refs:REG_OFFSET (Results 1 - 13 of 13) sorted by relevance
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/mips/ddb5xxx/ddb5477/ |
H A D | kgdb_io.c | 21 #define REG_OFFSET 8 macro 65 #define OFS_INTR_ENABLE (1*REG_OFFSET) 66 #define OFS_INTR_ID (2*REG_OFFSET) 67 #define OFS_DATA_FORMAT (3*REG_OFFSET) 68 #define OFS_LINE_CONTROL (3*REG_OFFSET) 69 #define OFS_MODEM_CONTROL (4*REG_OFFSET) 70 #define OFS_RS232_OUTPUT (4*REG_OFFSET) 71 #define OFS_LINE_STATUS (5*REG_OFFSET) 72 #define OFS_MODEM_STATUS (6*REG_OFFSET) 73 #define OFS_RS232_INPUT (6*REG_OFFSET) [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/mips/gt64120/momenco_ocelot/ |
H A D | dbg_io.c | 43 #define REG_OFFSET 4 macro 49 #define OFS_INTR_ENABLE (1*REG_OFFSET) 50 #define OFS_INTR_ID (2*REG_OFFSET) 51 #define OFS_DATA_FORMAT (3*REG_OFFSET) 52 #define OFS_LINE_CONTROL (3*REG_OFFSET) 53 #define OFS_MODEM_CONTROL (4*REG_OFFSET) 54 #define OFS_RS232_OUTPUT (4*REG_OFFSET) 55 #define OFS_LINE_STATUS (5*REG_OFFSET) 56 #define OFS_MODEM_STATUS (6*REG_OFFSET) 57 #define OFS_RS232_INPUT (6*REG_OFFSET) [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/mips/momentum/ocelot_c/ |
H A D | dbg_io.c | 43 #define REG_OFFSET 4 macro 49 #define OFS_INTR_ENABLE (1*REG_OFFSET) 50 #define OFS_INTR_ID (2*REG_OFFSET) 51 #define OFS_DATA_FORMAT (3*REG_OFFSET) 52 #define OFS_LINE_CONTROL (3*REG_OFFSET) 53 #define OFS_MODEM_CONTROL (4*REG_OFFSET) 54 #define OFS_RS232_OUTPUT (4*REG_OFFSET) 55 #define OFS_LINE_STATUS (5*REG_OFFSET) 56 #define OFS_MODEM_STATUS (6*REG_OFFSET) 57 #define OFS_RS232_INPUT (6*REG_OFFSET) [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-ixp4xx/ |
H A D | gtwx5715-setup.c | 58 #define REG_OFFSET 3 macro 60 #define REG_OFFSET 0 macro 85 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
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H A D | coyote-setup.c | 56 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET, 93 (char*)(IXP4XX_UART1_BASE_VIRT + REG_OFFSET);
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H A D | dsmg600-setup.c | 91 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET, 100 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
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H A D | nas100d-setup.c | 99 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET, 108 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
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H A D | nslu2-setup.c | 114 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET, 123 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
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H A D | avila-setup.c | 80 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET, 89 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
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H A D | ixdp425-setup.c | 77 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET, 86 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/arch-ixp4xx/ |
H A D | platform.h | 19 #define REG_OFFSET 0 macro 21 #define REG_OFFSET 3 macro
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/ia64/hp/sim/boot/ |
H A D | fw-emu.c | 105 #define REG_OFFSET(addr) (0x00000000000000FF & (addr)) macro 210 r9 = inb(0xCFC + ((REG_OFFSET(in1) & 3))); 212 r9 = inw(0xCFC + ((REG_OFFSET(in1) & 2))); 224 outb(in3, 0xCFC + ((REG_OFFSET(in1) & 3))); 226 outw(in3, 0xCFC + ((REG_OFFSET(in1) & 2)));
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/media/video/ |
H A D | bt856.c | 71 #define REG_OFFSET 0xDA macro 92 encoder->reg[reg - REG_OFFSET] = value; 106 reg[reg - REG_OFFSET] & ~(1 << bit)) |
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