/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/blackfin/mach-common/ |
H A D | lock.S | 44 [--SP]=( R7:0,P5:0 ); 52 R7 = R0; define 82 R5 = R7; 83 CC = BITTST(R7,0); 85 R7 = 0; define 86 BITSET(R7,0); 90 R7 = 0; define 91 BITCLR(R7,0); 92 .LDONE1: R4 = R7 << 3; 93 R7 define 94 R7 = R7 | R4; define 100 R7 = R5; define 103 R7 = 0; define 108 R7 = 0; define 111 R7 = [P1]; define 112 R7 = R7 | R4; define 118 R7 = R5; define 121 R7 = 0; define 125 R7 = 0; define 128 R7 = [P1]; define 129 R7 = R7 | R4; define 136 R7 = R5; define 139 R7 = 0; define 143 R7 = 0; define 146 R7 = [P1]; define 147 R7 = R7 | R4; define 176 R7 = [P1]; define 178 R7 = R7 & R2; define 180 R7 = R0 | R7; define [all...] |
H A D | dpmc.S | 37 [--SP] = ( R7:0, P5:0 ); 45 R7 = [P0]; define 47 BITSET(R7, 27); 49 BITSET(R7,(IRQ_WATCH - IVG7)); 51 [P0] = R7; 54 ( R7:0, P5:0 ) = [SP++]; 61 R7 = 0x0000(z); define 69 [P0] = R7; 74 [--SP] = ( R7:0, P5:0 ); 92 R7 define 106 R7 = W[P0](Z); define 113 R7 = W[P0](Z); define 131 R7 = 0x0AD6(Z); define 135 R7 = W[P0](Z); define 140 R7 = W[P0](Z); define 158 R7 = 0xAD6(Z); define 195 R7 = w[p0](z); define 313 R7 = W[P0](z); define [all...] |
H A D | cache.S | 47 [--SP] = R7; 49 R7 = R0; define 50 CC = BITTST(R7,CPLB_ENABLE_ICACHE_P); 56 CC = BITTST(R7,CPLB_ENABLE_DCACHE_P); 63 CC = BITTST(R7,CPLB_ENABLE_DCACHE2_P); 71 R7 = [SP++]; define 80 [--SP] = ( R7:5); 84 R7 = [P0]; define 89 BITCLR(R7,IMC_P); 93 [P0] = R7; 99 R7 = R7 | R6; define 202 R7 = [P0]; define 219 R7 = R7 | R6; define [all...] |
H A D | cplbmgr.S | 65 [--SP]=( R7:4,P5:3 ); 155 R7 = [P0 - 0x104]; define 167 CC = R7==R2; 169 R7 = [P3]; define 170 R7 += 1; 171 [P3] = R7; 268 ( R7:4,P5:3 ) = [SP++]; 274 ( R7:4,P5:3 ) = [SP++]; 278 ( R7:4,P5:3 ) = [SP++]; 282 ( R7 411 R7 = EXTRACT(R1,R3.l); define 412 R7 = R7 << 2; /* Page size index offset */ define 415 R7 = [P3]; /* page size in bytes */ define 417 R7 = R2 + R7; /* R7 - PageEnd */ define 442 R7 = [P0 - 0x104]; define 456 R7 = [P3]; define [all...] |
H A D | entry.S | 68 R7 = 0x13; \ define 69 [P5] = R7; 73 R7 = 0x01; \ define 74 [P5] = R7; 104 (R7:6,P5:4) = [sp++]; 127 (R7:6,P5:4) = [sp++]; 168 syscfg = R7; 186 R7=LC0; 187 LC0=R7; 188 R7 237 R7 = [P5]; define 240 R7 = R7 & R6; define 244 R7 = R7 + R6; define 288 R7 = [P5]; define 291 R7 = R7 & R6; define 295 R7 = R7 + R6; define 313 R7 = [P4]; define [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/ap/gpl/minidlna/ffmpeg-0.5.1/libavcodec/bfin/ |
H A D | idct_bfin.S | 27 Registers Used : A0, A1, R0-R7, I0-I3, B0, B2, B3, M0-M2, L0-L3, P0-P5, LC0. 96 [--SP] = (R7:4, P5:3); // Push the registers onto the stack. 120 R7 = 0x8000(Z); define 124 R7 = [I3++] || [TMP2]=R7; // Coefficient C4 is read into R7.H and R7.L. define 135 * R7=(C2,C6) 139 A1=R7.H*R0.H, A0=R7 220 R7 = [I3++]; // R7.H = C4 and R7.L = C4 define [all...] |
H A D | vp3_idct_bfin.S | 27 Registers Used : A0, A1, R0-R7, I0-I3, B0, B2, B3, M0-M2, L0-L3, P0-P5, LC0. 69 [--SP] = (R7:4, P5:3); // Push the registers onto the stack. 93 R7 = 0x8000(Z); define 97 R7 = [I3++] || [TMP2]=R7; // Coefficient C4 is read into R7.H and R7.L. define 108 * R7=(C2,C6) 112 A1=R7.H*R0.H, A0=R7 193 R7 = [I3++]; // R7.H = C4 and R7.L = C4 define [all...] |
H A D | fdct_bfin.S | 60 R0, R1, R2, R3, R4, R5, R6,R7, P0, P1, P2, P3, P4, P5, A0, A1. 150 [--SP] = (R7:4, P5:3); // Push the registers onto the stack. 207 R7 = [P1++P2] || R2 = [I2++]; // P1 points to temporary array define 209 // R7 is a dummy read. X4,X5 230 * R7 = C4 = cos(4*pi/16) 233 R1 = R1 +|+ R2, R2 = R1 -|- R2 (CO) || NOP || R7 = [I3++]; 261 A1=R3.H*R7.l, A0=R3.H*R7.l || I1+=M1 || W[I0] = R3.L; 262 R4.H=(A1-=R2.L*R7.l), R4.L=(A0+=R2.L*R7 [all...] |
H A D | pixels_bfin.S | 25 [--SP] = (R7:4); 49 (R7:4) = [SP++]; 55 [-- SP] = (R7:4); 71 apc$2: R7 = BYTEOP3P(R1:0, R3:2) (HI, R) || R0 = [I3++] || R3 = [I1++M0]; 74 R6 = R6 + R7 (S) || R1.H = W[I3]; 76 R7 = BYTEOP3P(R1:0, R3:2) (HI, R) || R0 = [I3++] || R2 = [I1]; define 79 R6 = R6 + R7 (S) || R1.H = W[I3++]; 82 (R7:4) = [SP++]; 121 R7 = BYTEOP1P(R1:0,R3:2)(R) || R0 = [I0++] || [I3++] = R6 ; define 122 pp8$1: DISALGNEXCPT || R2 = [I1++] || [I3++M3] = R7; 151 R7 = BYTEOP1P(R1:0,R3:2)(R) || R1 = [I0++] || R3 =[I1++]; define 154 R7 = BYTEOP1P(R1:0,R3:2)(R) || R0 = [I0++] || [I3++] = R7 ; define 186 R7 = BYTEOP1P(R1:0,R3:2)(T,R) || R0 = [I0++] || [I3++] = R6 ; define 214 R7 = BYTEOP1P(R1:0,R3:2)(T,R) || R1 = [I0++] || R3 =[I1++]; define 218 R7 = BYTEOP1P(R1:0,R3:2)(T,R) || R0 = [I0++] || [I3++] = R7 ; define [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/blackfin/lib/ |
H A D | modsi3.S | 13 * R2-R7 63 [--SP] = (R7:6); /* Push R7 and R6 */ 65 R7 = R0; /* Copy of R0 */ define 71 R0 = R7 - R0; /* Dividend - (quotient * divisor) */ 73 (R7:6) = [SP++]; /* Pop registers R7 and R4 */
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H A D | umodsi3.S | 53 [--SP] = (R7:6); /* Push registers and */ 55 R7 = R0; /* Copy of R0 */ define 61 R0 = R7 - R0; /* Dividend - (quotient * divisor) */ 63 ( R7:6) = [SP++]; /* And registers */
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H A D | divsi3.S | 23 * Registers Used : R2-R7,P0-P2 131 [--SP] = (R7:5); /* Push registers R5-R7 */ 143 .Llst: R7 = R2 >> 31; /* record copy of carry from R2 */ 146 R0 = R0 | R7; /* and add carry */ 164 (R7:5)= [SP++]; /* Pop registers R6-R7 */
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H A D | udivsi3.S | 139 [--SP] = (R7:5); /* Push registers R5-R7 */ 169 R7 = 0; /* Initialise quotient bit */ define 177 CC = R7 < 0; /* Check quotient(AQ) */ 181 R7 = R3 ^ R1; /* Generate next quotient bit */ define 183 R5 = R7 >> 31; /* Get AQ */ 202 (R7:5) = [SP++]; /* Pop registers R5-R7 */
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-blackfin/ |
H A D | entry.h | 30 [--sp] = (R7:0,P5:0); \ 41 [--sp] = (R7:0,P5:0); \
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/x86_64/crypto/ |
H A D | aes-x86_64-asm.S | 46 #define R7 %rbp define 136 prologue(FUNC,KEY,B128,B192,R2,R8,R7,R9,R1,R3,R4,R6,R10,R5,R11) 138 #define return epilogue(R8,R2,R9,R7,R5,R6,R3,R4,R11) 141 round(TAB,OFFSET,R1,R2,R3,R4,R5,R6,R7,R10,R5,R6,R3,R4) \ 145 round(TAB,OFFSET,R1,R2,R3,R4,R5,R6,R7,R10,R5,R6,R3,R4) 148 round(TAB,OFFSET,R2,R1,R4,R3,R6,R5,R7,R10,R5,R6,R3,R4) \ 152 round(TAB,OFFSET,R2,R1,R4,R3,R6,R5,R7,R10,R5,R6,R3,R4)
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-blackfin/mach-common/ |
H A D | context.S | 41 [--sp] = ( R7:0, P5:0 ); 108 [--sp] = ( R7:0, P5:0 ); 167 [--sp] = ( R7:0, P5:0 ); 286 ( R7 : 0, P5 : 0) = [ SP ++ ]; 344 ( R7 : 0, P5 : 0) = [ SP ++ ];
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/ap/gpl/minidlna/ffmpeg-0.5.1/libavcodec/arm/ |
H A D | simple_idct_arm.S | 96 mov r7, r1, asr #16 @ R7=R1>>16=ROWr16[1] (evaluate it now, as it could be useful later) 98 orrs r5, r5, r7 @ R5=R4 | R3 | R2 | R7 103 @@ R5=(temp), R6=ROWr16[0], R7=ROWr16[1], R8-R11 free, 123 mul r7, r11, r7 @ R7=W7*ROWr16[1]=b3 (ROWr16[1] must be the second arg, to have the possibility to save 1 cycle) 129 mlane r7, r10, r2, r7 @ R7-=W5*ROWr16[3]=b3 (ROWr16[3] must be the second arg, to have the possibility to save 1 cycle) 132 @@ R5=b2, R6=ROWr16[0], R7=b3, R8=W1, R9=W3, R10=W5, R11=W7, 140 @@ R5=b2, R6=ROWr16[0], R7=b3, R8=W1, R9=W3, R10=W5, R11=W7, 155 mlane r7, r9, r3, r7 @ R7+=W3*ROWr16[5]=b3 157 mlane r1, r8, r3, r1 @ R7-=W1*ROWr16[5]=b1 163 mlane r7, r8, r4, r7 @ R7 [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/media/video/ |
H A D | wm8739.c | 52 R5 = 5, R6, R7, R8, R9, R15 = 15, enumerator in enum:__anon5079 302 wm8739_write(client, R7, 0x049); /* Digital Audio interface format */
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H A D | wm8775.c | 50 R7 = 7, R11 = 11, enumerator in enum:__anon5080 195 wm8775_write(client, R7, 0x000); /* Disable zero cross detect timeout */
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/sh/kernel/ |
H A D | kgdb_stub.c | 140 R0 = 0, R1, R2, R3, R4, R5, R6, R7, enumerator in enum:regs 496 gdb_regs[R7] = regs->regs[R7]; 525 regs->regs[R7] = gdb_regs[R7];
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/m32r/kernel/ |
H A D | entry.S | 91 #define R7(reg) @(0x20,reg) define
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/net/hamradio/ |
H A D | z8530.h | 13 #define R7 7 macro
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/ap/gpl/openssl/crypto/md5/asm/ |
H A D | md5-sparcv9.S | 57 #define R7 %l7 define 73 #define Cval R7 217 LOAD X(7),R7 230 add T1,R7,T1 541 !pre-LOADed X(7),R7 554 add T1,R7,T1 649 !pre-LOADed X(7),R7 661 add T1,R7,T1 794 !pre-LOADed X(7),R7 807 add T1,R7,T [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/ap/gpl/timemachine/openssl-0.9.8e/crypto/md5/asm/ |
H A D | md5-sparcv9.S | 57 #define R7 %l7 define 73 #define Cval R7 217 LOAD X(7),R7 230 add T1,R7,T1 541 !pre-LOADed X(7),R7 554 add T1,R7,T1 649 !pre-LOADed X(7),R7 661 add T1,R7,T1 794 !pre-LOADed X(7),R7 807 add T1,R7,T [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/blackfin/mach-bf561/ |
H A D | head.S | 50 R7 = R0; define 264 R0 = R7;
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