/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/blackfin/lib/ |
H A D | smulsi3_highpart.S | 12 R2 = R1.L * R0.L (FU); 13 R3 = R1.H * R0.L (IS,M); 14 R0 = R0.H * R1.H, R1 = R0.H * R1.L (IS,M); 16 R1.L = R2.H + R1.L; 20 R1.L = R1.L + R3.L; 22 R1 >>> 24 R1 = R1 + R3; define 25 R1 = R1 + R2; define 27 R1 = R1 + R2; define [all...] |
H A D | umulsi3_highpart.S | 12 R2 = R1.H * R0.H, R3 = R1.L * R0.H (FU); 13 R0 = R1.L * R0.L, R1 = R1.H * R0.L (FU); 18 R0 = R0 + R1; 20 R1 = cc; define 21 R1 = PACK(R1.l,R0.h); define 22 R0 = R1 [all...] |
H A D | divsi3.S | 21 * R1 - Denominator (i) 59 R3 = R0 ^ R1; 77 DIVS(R0, R1); 78 DIVQ(R0, R1); 79 DIVQ(R0, R1); 80 DIVQ(R0, R1); 81 DIVQ(R0, R1); 82 DIVQ(R0, R1); 83 DIVQ(R0, R1); 84 DIVQ(R0, R1); 205 R1 = R1.L (Z); define [all...] |
H A D | memmove.S | 37 * R1 = From Address 45 P3 = R1; /* P3 = From Address */ 50 CC = R1 < R0 (IU); /* From < To */ 52 R3 = R1 + R2; 59 R3 = R1 | R0; /* OR addresses together */ 70 R1 = [I0++]; define 75 [P0++] = R1; 77 R1 = [I0++]; define 81 MNOP || [P0++] = R1 || R1 102 R1 = B[P3--] (Z); define [all...] |
H A D | udivsi3.S | 43 CC = R0 < R1 (IU); /* If X < Y, always return 0 */ 46 R2 = R1 << 16; 51 R3 = R1 >> 15; /* and Y is a 15-bit number */ 70 DIVQ(R0, R1); // 1 71 DIVQ(R0, R1); // 2 72 DIVQ(R0, R1); // 3 73 DIVQ(R0, R1); // 4 74 DIVQ(R0, R1); // 5 75 DIVQ(R0, R1); // 6 76 DIVQ(R0, R1); // 241 R1 = R1.L (Z); define 296 R1 = R0 - R3; define [all...] |
H A D | memcmp.S | 34 * R1 = Second Address (s2) 47 P3 = R1; /* P3 = s2 Address */ 51 I0 = R1; /* s2 */ 52 R1 = R1 | R0; /* OR addresses together */ define 53 R1 <<= 30; /* check bottom two bits */ 66 R1 = [I0++]; define 68 MNOP || R0 = [P0++] || R1 = [I0++]; 70 CC = R0 == R1; 83 R1 define [all...] |
H A D | modsi3.S | 11 * Numerator/ Denominator in R0, R1 51 CC=R1==0; 53 CC=R0==R1; 55 CC = R1 == 1; 57 CC = R1 == -1; 66 R6 = R1; /* Save for later */
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H A D | umodsi3.S | 44 CC= R1==0; 46 CC=R0==R1; 48 CC = R1 == 1; 50 CC = R0<R1 (IU); 56 R6 = R1;
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H A D | memset.S | 43 * R1 = filler byte 54 R1 = R1.B (Z); /* R1 = fill char */ define 62 R2 = R1 << 8; /* create quad filler */ 63 R2.L = R2.L + R1.L(NS); 64 R2.H = R2.L + R1.H(NS); 88 B[P0++] = R1; 100 B[P0++] = R1; 105 B[P0++] = R1; [all...] |
H A D | memchr.S | 34 * R1 = sought byte (c) 47 R1 = R1.B(Z); define 56 CC = R3 == R1;
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H A D | memcpy.S | 40 * R1 = From Address (src) 59 P1 = R1 ; /* src*/ 63 CC = R1 < R0; /* src < dst */ 65 R3 = R1 + R2; 72 R3 = R1 | R0; 86 R0 = R1; /* setup src address for return */ 98 R0 = R1; 123 R0 = R1; /* Save src address for return */ 125 R1 = B[P1++] (X); define 127 B[P0++] = R1; 145 R1 = B[P1--] (X); define [all...] |
H A D | outs.S | 36 P1 = R1; /* P1 = address */ 47 P1 = R1; /* P1 = address */ 58 P1 = R1; /* P1 = address */
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/blackfin/mach-bf537/boards/ |
H A D | led.S | 21 [--SP] = R1; 23 R1 = PF6|PF7|PF8|PF9|PF10|PF11 (Z); define 24 R2 = ~R1; 38 R0 = R0 | R1; 51 R1 = [SP++]; define 64 [--SP] = R1; 66 R1 = 1; define 68 R1 <<= R0; 73 R0 = R0 | R1; 76 R1 define 89 R1 = 1; define 92 R1 = ~R1; define 100 R1 = [SP++]; define 113 R1 = 1; define 123 R1 = [SP++]; define 137 R1 = 0x3f(X); define 146 R1 = ~R1; define 152 R1 = [SP++]; define 166 R1 = 0x3f(X); define 168 R1 = 6(X); define 172 R1 = W[P0](Z); define 174 R1 = R1 ^ R0; define 178 R1 = [SP++]; define [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/blackfin/mach-common/ |
H A D | cacheinit.S | 62 CC = R0 == R1; 69 R3 = R3 + R1; 70 CC = R3 == R1; 77 R1 = [P0]; define 79 R0 = R0 | R1; 107 R1 = -1; /* end point comparison */ define 113 cc = R0 == R1; 120 R3 = R3 + R1; 121 CC = R3 == R1; 126 R1 define [all...] |
H A D | cplbhdlr.S | 52 R1 = 0x23; /* Data access CPLB protection violation */ define 53 CC = R2 == R1; 59 R1 = 0x2C; /* CPLB miss on an instruction fetch */ define 60 CC = R2 == R1; 64 R1 = 0x26; define 65 CC = R2 == R1; 74 R1 = CPLB_ENABLE_ICACHE; define 77 R1 = CPLB_ENABLE_DCACHE; define 80 R1 = CPLB_ENABLE_DCACHE | CPLB_ENABLE_ICACHE; define 83 R1 define 124 R1 = sp; define [all...] |
H A D | cplbmgr.S | 95 R1 = [P0-0x100]; /* Address for this CPLB */ define 100 CC = R4 < R1(IU); /* If fault address less than page start*/ 106 R1 = R1 + R2; /* and add to page start, to get page end*/ define 107 CC = R4 < R1(IU); /* and see whether fault addr is in page.*/ 131 CLI R1; 136 STI R1; 138 R1 = -1; /* end point comparison */ define 145 R3 = R3 + R1; 146 CC = R3 == R1; 213 R1 = ((16<<8)|2); define 399 R1 = [P0++]; /* Fetch each installed CPLB in turn*/ define 488 R1 = R1 - R0; define 519 R1 = (16<<8)|2; define [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/x86_64/crypto/ |
H A D | twofish-x86_64-asm.S | 46 #define R1 %rbx define 222 pushq R1 232 movq (R3), R1 234 input_whitening(R1,%r11,a_offset) 238 shr $32, R1 243 encrypt_round(R0,R1,R2,R3,0); 244 encrypt_round(R2,R3,R0,R1,8); 245 encrypt_round(R0,R1,R2,R3,2*8); 246 encrypt_round(R2,R3,R0,R1,3*8); 247 encrypt_round(R0,R1,R [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/ap/gpl/openssl/crypto/bn/asm/ |
H A D | bn-alpha.pl | 8 $d =~ s/R1/1/g; 60 ldq $R1,0($16) # 1 1 71 addq $R1,$L1,$R1 # 1 2 2 74 cmpult $R1,$L1,$O1 # 1 2 3 1 76 addq $R1,$CC,$R1 # 1 2 3 1 78 cmpult $R1,$CC,$CC # 1 2 3 2 92 stq $R1,-32($16) # 1 2 4 111 ldq $R1, [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/ap/gpl/minidlna/ffmpeg-0.5.1/libavcodec/bfin/ |
H A D | pixels_bfin.S | 30 I1 = R1; // dest 35 R1 = [I0++]; define 39 R3 = MAX(R1, R4) (V); 41 R6 = BYTEPACK (R2,R3) || R1 = [I0++]; 44 R3 = MAX(R1, R4) (V); 46 R6 = BYTEPACK (R2,R3) || R1 = [I0++]; 60 I1 = R1; // dest 62 I2 = R1; // dest 67 R3 = R3 >> 8 || R1.L = W[I3] || I3 += 4; 68 R6 = BYTEOP3P(R1 [all...] |
H A D | fdct_bfin.S | 60 R0, R1, R2, R3, R4, R5, R6,R7, P0, P1, P2, P3, P4, P5, A0, A1. 212 R1.H = W[I0++]; // X2 is read into R1.H. 220 * It reads the data 3 in R1.L. 223 R0 = R0 +|+ R3, R3 = R0 -|- R3 || R1.L = W[I0++] || NOP; 233 R1 = R1 +|+ R2, R2 = R1 -|- R2 (CO) || NOP || R7 = [I3++]; define 236 * At the end of stage 1 R0 has (1,0), R1 has (2,3), R2 has (4, 5) and 247 R0 = R0 +|+ R1, R [all...] |
H A D | idct_bfin.S | 98 RELOC(R1, P3, coefs); // Pointer to Coefficients 100 B3 = R1; 134 * R1=(Y2,Y6) 139 A1=R7.H*R0.H, A0=R7.H*R0.H (IS) || I0+= 4 || R1.L=W[I1++]; 140 R3=(A1+=R7.H*R0.L), R2=(A0-=R7.H*R0.L) (IS) || R1.H=W[I0--] || R7=[I3++]; 157 * R1=Y2, R0=Y6 159 A1=R7.L*R1.H, A0=R7.H*R1.H (IS) || I0+=4 || R5.H=W[I0]; 160 R1=(A1-=R7.H*R1 [all...] |
H A D | vp3_idct_bfin.S | 71 RELOC(R1, P3, coefs); // Pointer to Coefficients 73 B3 = R1; 107 * R1=(Y2,Y6) 112 A1=R7.H*R0.H, A0=R7.H*R0.H (IS) || I0+= 4 || R1.L=W[I1++]; 113 R3=(A1+=R7.H*R0.L), R2=(A0-=R7.H*R0.L) (IS) || R1.H=W[I0--] || R7=[I3++]; 130 * R1=Y2, R0=Y6 132 A1=R7.L*R1.H, A0=R7.H*R1.H (IS) || I0+=4 || R5.H=W[I0]; 133 R1=(A1-=R7.H*R1 [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/ap/gpl/openssl/crypto/md4/ |
H A D | md4_dgst.c | 116 R1(A,B,C,D,X[ 0], 3,0x5A827999L); 117 R1(D,A,B,C,X[ 4], 5,0x5A827999L); 118 R1(C,D,A,B,X[ 8], 9,0x5A827999L); 119 R1(B,C,D,A,X[12],13,0x5A827999L); 120 R1(A,B,C,D,X[ 1], 3,0x5A827999L); 121 R1(D,A,B,C,X[ 5], 5,0x5A827999L); 122 R1(C,D,A,B,X[ 9], 9,0x5A827999L); 123 R1(B,C,D,A,X[13],13,0x5A827999L); 124 R1(A,B,C,D,X[ 2], 3,0x5A827999L); 125 R1( [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/ap/gpl/timemachine/openssl-0.9.8e/crypto/md4/ |
H A D | md4_dgst.c | 116 R1(A,B,C,D,X[ 0], 3,0x5A827999L); 117 R1(D,A,B,C,X[ 4], 5,0x5A827999L); 118 R1(C,D,A,B,X[ 8], 9,0x5A827999L); 119 R1(B,C,D,A,X[12],13,0x5A827999L); 120 R1(A,B,C,D,X[ 1], 3,0x5A827999L); 121 R1(D,A,B,C,X[ 5], 5,0x5A827999L); 122 R1(C,D,A,B,X[ 9], 9,0x5A827999L); 123 R1(B,C,D,A,X[13],13,0x5A827999L); 124 R1(A,B,C,D,X[ 2], 3,0x5A827999L); 125 R1( [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/ap/gpl/openssl/crypto/md5/ |
H A D | md5_dgst.c | 116 R1(A,B,C,D,X[ 1], 5,0xf61e2562L); 117 R1(D,A,B,C,X[ 6], 9,0xc040b340L); 118 R1(C,D,A,B,X[11],14,0x265e5a51L); 119 R1(B,C,D,A,X[ 0],20,0xe9b6c7aaL); 120 R1(A,B,C,D,X[ 5], 5,0xd62f105dL); 121 R1(D,A,B,C,X[10], 9,0x02441453L); 122 R1(C,D,A,B,X[15],14,0xd8a1e681L); 123 R1(B,C,D,A,X[ 4],20,0xe7d3fbc8L); 124 R1(A,B,C,D,X[ 9], 5,0x21e1cde6L); 125 R1( [all...] |