Searched refs:PORT (Results 1 - 25 of 32) sorted by relevance

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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/serial/
H A D8250_boca.c15 #define PORT(_base,_irq) \ macro
25 PORT(0x100, 12),
26 PORT(0x108, 12),
27 PORT(0x110, 12),
28 PORT(0x118, 12),
29 PORT(0x120, 12),
30 PORT(0x128, 12),
31 PORT(0x130, 12),
32 PORT(0x138, 12),
33 PORT(
[all...]
H A D8250_fourport.c15 #define PORT(_base,_irq) \ macro
25 PORT(0x1a0, 9),
26 PORT(0x1a8, 9),
27 PORT(0x1b0, 9),
28 PORT(0x1b8, 9),
29 PORT(0x2a0, 5),
30 PORT(0x2a8, 5),
31 PORT(0x2b0, 5),
32 PORT(0x2b8, 5),
H A D8250_au1x00.c29 #define PORT(_base, _irq) \ macro
43 PORT(UART0_ADDR, AU1000_UART0_INT),
44 PORT(UART1_ADDR, AU1000_UART1_INT),
45 PORT(UART2_ADDR, AU1000_UART2_INT),
46 PORT(UART3_ADDR, AU1000_UART3_INT),
48 PORT(UART0_ADDR, AU1500_UART0_INT),
49 PORT(UART3_ADDR, AU1500_UART3_INT),
51 PORT(UART0_ADDR, AU1100_UART0_INT),
52 PORT(UART1_ADDR, AU1100_UART1_INT),
54 PORT(UART3_ADD
[all...]
H A D8250_exar_st16c554.c18 #define PORT(_base,_irq) \ macro
28 PORT(0x100, 5),
29 PORT(0x108, 5),
30 PORT(0x110, 5),
31 PORT(0x118, 5),
H A D8250_mca.c22 #define PORT(_base,_irq) \ macro
32 PORT(0x3220, 3),
33 PORT(0x3228, 3),
34 PORT(0x4220, 3),
35 PORT(0x4228, 3),
36 PORT(0x5220, 3),
37 PORT(0x5228, 3),
H A D8250_accent.c15 #define PORT(_base,_irq) \ macro
25 PORT(0x330, 4),
26 PORT(0x338, 4),
H A Dip22zilog.c95 #define ZILOG_CHANNEL_FROM_PORT(PORT) ((struct zilog_channel *)((PORT)->membase))
96 #define UART_ZILOG(PORT) ((struct uart_ip22zilog_port *)(PORT))
97 #define IP22ZILOG_GET_CURR_REG(PORT, REGNUM) \
98 (UART_ZILOG(PORT)->curregs[REGNUM])
99 #define IP22ZILOG_SET_CURR_REG(PORT, REGNUM, REGVAL) \
100 ((UART_ZILOG(PORT)->curregs[REGNUM]) = (REGVAL))
H A Dsunzilog.c109 #define ZILOG_CHANNEL_FROM_PORT(PORT) ((struct zilog_channel __iomem *)((PORT)->membase))
110 #define UART_ZILOG(PORT) ((struct uart_sunzilog_port *)(PORT))
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/mips/mips-boards/generic/
H A Dconsole.c29 #define PORT(offset) (ATLAS_UART_REGS_BASE + ((offset)<<3)) macro
31 #define PORT(offset) (ATLAS_UART_REGS_BASE + 3 + ((offset)<<3)) macro
39 #define PORT(offset) (SEAD_UART0_REGS_BASE + ((offset)<<3)) macro
41 #define PORT(offset) (SEAD_UART0_REGS_BASE + 3 + ((offset)<<3)) macro
46 #define PORT(offset) (0x3f8 + (offset)) macro
52 return inb(PORT(offset));
57 outb(value, PORT(offset));
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/i386/kernel/
H A Dlegacy_serial.c26 #define PORT(_base,_irq,_flags) \ macro
36 PORT(0x3F8, 4, COM_FLAGS),
37 PORT(0x2F8, 3, COM_FLAGS),
38 PORT(0x3E8, 4, COM_FLAGS),
39 PORT(0x2E8, 3, COM4_FLAGS),
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/net/
H A Ddgrs_ether.h104 } PORT; typedef in typeref:struct:__anon5386
113 extern PORT Port[1+SE_NPORTS+1];
130 extern void eth_xmit_spew_on(PORT *p, int cnt);
131 extern void eth_xmit_spew_off(PORT *p);
133 extern I596_RBD *alloc_rbds(PORT *p, int num);
135 extern I596_CB * eth_cb_alloc(PORT *p);
H A Dni65.c114 #define PORT p->cmdr_addr macro
150 #define writereg(val,reg) {outw(reg,PORT+L_ADDRREG);outw(val,PORT+L_DATAREG);}
151 #define readreg(reg) (outw(reg,PORT+L_ADDRREG),inw(PORT+L_DATAREG))
258 outw(80,PORT+L_ADDRREG);
259 if(inw(PORT+L_ADDRREG) != 80)
263 outw(0,PORT+L_ADDRREG);
264 outw((short)isa0,PORT+L_BUSIF); /* write ISA 0: DMA_R : isa0 * 50ns */
265 outw(1,PORT
[all...]
H A Dlp486e.c49 the PORT and CA signal, and the interrupt glue needed for a pc.
51 PORT SIZE ACTION MEANING
52 0xCB0 2 WRITE Lower 16 bits for PORT command
53 0xCB2 2 WRITE Upper 16 bits for PORT command, and issue of PORT command
420 PORT(phys_addr a, unsigned int cmd) { function
422 printk("lp486e.c: PORT: address not aligned\n");
482 PORT(0, PORT_RESET); /* address part ignored */
489 PORT(va_to_pa(&lp->scp), PORT_ALTSCP); /* change the scp address */
H A Ddgrs.c207 PORT *port; /* Ptr to PORT[0] struct in VM */
1111 priv0->port = (PORT *) S2H(priv0->bcomm->bc_port);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/scsi/
H A Daha152x.h41 #define PORTA (HOSTIOPORT1+0x1a) /* PORT A */
42 #define PORTB (HOSTIOPORT1+0x1b) /* PORT B */
50 #define O_PORTA 0x1a /* PORT A */
51 #define O_PORTB 0x1b /* PORT B */
56 #define O_TC_PORTA 0x0a /* PORT A */
57 #define O_TC_PORTB 0x0b /* PORT B */
288 #define SETPORT(PORT, VAL) outb( (VAL), (PORT) )
289 #define GETPORT(PORT) inb( PORT )
[all...]
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/ap/gpl/bftpd-1.6.6/
H A Dbftpd.conf13 PORT="21"
28 #If PORT data connections should be opened from port 20, say yes here. You
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/mips/sni/
H A Dpcit.c22 #define PORT(_base,_irq) \ macro
32 PORT(0x3f8, 0),
33 PORT(0x2f8, 3),
46 PORT(0x3f8, 0),
47 PORT(0x2f8, 3),
48 PORT(0x3e8, 4),
49 PORT(0x2e8, 3),
H A Da20r.c20 #define PORT(_base,_irq) \ macro
30 PORT(0x3f8, 4),
31 PORT(0x2f8, 3),
H A Drm200.c21 #define PORT(_base,_irq) \ macro
31 PORT(0x3f8, 4),
32 PORT(0x2f8, 3),
H A Dpcimt.c70 #define PORT(_base,_irq) \ macro
80 PORT(0x3f8, 4),
81 PORT(0x2f8, 3),
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/sound/oss/
H A Dsscape.c84 #define PORT(name) (devc->base+name) macro
169 outb(reg, PORT(ODIE_ADDR));
170 val = inb(PORT(ODIE_DATA));
177 outb(reg, PORT(ODIE_ADDR));
178 outb(data, PORT(ODIE_DATA));
215 outb((0x00), PORT(HOST_CTRL)); /* Put the board to the host mode */
220 outb((0x03), PORT(HOST_CTRL)); /* Put the board to the MIDI mode */
236 if (inb(PORT(HOST_CTRL)) & TX_READY)
244 outb(data[i], PORT(HOST_DATA));
262 if (inb(PORT(HOST_CTR
[all...]
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/ap/gpl/openssl/apps/
H A Ds_apps.h146 #define PORT 4433 macro
H A Ds_client.c243 short port=PORT;
H A Ds_server.c278 BIO_printf(bio_err," -accept arg - port to accept on (default is %d)\n",PORT);
485 short port=PORT;
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/ap/gpl/timemachine/openssl-0.9.8e/apps/
H A Ds_apps.h147 #define PORT 4433 macro

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