Searched refs:OpenPIC (Results 1 - 4 of 4) sorted by relevance

/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/ppc/syslib/
H A Dopen_pic.c32 static volatile struct OpenPIC __iomem *OpenPIC = NULL; variable in typeref:struct:__iomem
89 .typename = " OpenPIC ",
104 .typename = " OpenPIC ",
254 openpic_writefield(&OpenPIC->Global.Global_Configuration1,
260 openpic_setfield(&OpenPIC->Global.Global_Configuration1,
268 openpic_setfield(&OpenPIC->Global.Global_Configuration0,
270 while (openpic_readfield(&OpenPIC->Global.Global_Configuration0,
285 src = &((struct OpenPIC __iomem *)OpenPIC_Addr)->Source[first_irq];
292 * OpenPIC star
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H A Dopen_pic_defs.h30 * OpenPIC supports up to 2048 interrupt sources and up to 32 processors
45 * OpenPIC Registers are 32 bits and aligned on 128 bit boundaries
154 * OpenPIC Register Map
157 struct OpenPIC { struct
H A Dopen_pic2.c32 static volatile struct OpenPIC *OpenPIC2 = NULL;
187 src = &((struct OpenPIC *)OpenPIC2_Addr)->Source[first_irq];
194 * OpenPIC start in the space of interrupt numbers that the kernel knows
195 * about. In other words, the OpenPIC's IRQ0 is numbered `offset' in the
197 * We assume there is only one OpenPIC.
209 OpenPIC2 = (volatile struct OpenPIC *)OpenPIC2_Addr;
235 printk("OpenPIC (2) Version %s (%d CPUs and %d IRQ sources) at %p\n",
239 printk("OpenPIC timer frequency is %d.%06d MHz\n",
379 * timer: OpenPIC timer number
462 * irq: OpenPIC interrup
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-ppc/
H A Dhydra.h51 char OpenPIC[0x40000]; member in struct:Hydra
67 #define HYDRA_FC_MPIC_ENABLE 0x00000040 /* Enable OpenPIC */
69 #define HYDRA_FC_MPIC_IS_MASTER 0x00000100 /* OpenPIC Master Mode */
73 * OpenPIC Interrupt Sources

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