Searched refs:CSR7 (Results 1 - 6 of 6) sorted by relevance
| /netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/net/tulip/ |
| H A D | pnic.c | 65 iowrite32((ioread32(ioaddr + CSR7) & ~TPLnkFail) | TPLnkPass, ioaddr + CSR7);
86 iowrite32((ioread32(ioaddr + CSR7) & ~TPLnkPass) | TPLnkFail, ioaddr + CSR7);
97 if(!ioread32(ioaddr + CSR7)) {
164 if(!ioread32(ioaddr + CSR7)) {
170 iowrite32(tulip_tbl[tp->chip_id].valid_intrs, ioaddr + CSR7);
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| H A D | interrupt.c | 310 iowrite32(tulip_tbl[tp->chip_id].valid_intrs, tp->base_addr+CSR7);
536 iowrite32(tulip_tbl[tp->chip_id].valid_intrs&~RxPollInt, ioaddr + CSR7);
700 iowrite32(tulip_tbl[tp->chip_id].valid_intrs, ioaddr + CSR7);
717 iowrite32(0x00, ioaddr + CSR7);
722 iowrite32(((~csr5) & 0x0001ebef) | AbnormalIntr | TimerInt, ioaddr + CSR7);
758 iowrite32(0x00, ioaddr + CSR7);
765 ioaddr + CSR7);
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| H A D | xircom_cb.c | 62 #define CSR7 0x38 macro
103 CSR0, CSR6, CSR7, CSR9, CSR10, CSR15
932 val = inl(card->io_port + CSR7); /* Interrupt enable register */
934 outl(val, card->io_port + CSR7);
950 val = inl(card->io_port + CSR7); /* Interrupt enable register */
952 outl(val, card->io_port + CSR7);
967 val = inl(card->io_port + CSR7); /* Interrupt enable register */
969 outl(val, card->io_port + CSR7);
987 outl(val, card->io_port + CSR7);
1002 val = inl(card->io_port + CSR7); /* Interrup
[all...] |
| H A D | tulip.h | 45 int valid_intrs; /* CSR7 interrupt enable settings */
113 CSR7 = 0x38, enumerator in enum:tulip_offsets
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| H A D | tulip_core.c | 429 iowrite32(ioread32(ioaddr+CSR7)| 0x00008010, ioaddr + CSR7); local
475 iowrite32(tulip_tbl[tp->chip_id].valid_intrs, ioaddr + CSR7);
541 (int)ioread32(ioaddr + CSR7), (int)ioread32(ioaddr + CSR12));
737 iowrite32 (0x00000000, ioaddr + CSR7);
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| H A D | xircom_tulip_cb.c | 205 CSR6=0x30, CSR7=0x38, CSR8=0x40, CSR9=0x48, CSR10=0x50, CSR11=0x58, enumerator in enum:xircom_offsets
241 int valid_intrs; /* CSR7 interrupt enable settings */
769 outl(xircom_tbl[tp->chip_id].valid_intrs, ioaddr + CSR7);
1291 outl(0, ioaddr + CSR7);
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Completed in 186 milliseconds