Searched refs:CSCR (Results 1 - 9 of 9) sorted by relevance

/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-imx/
H A Dcpufreq.c71 CSCR &= ~CSCR_MPEN;
78 CSCR |= CSCR_MPEN;
158 cscr = CSCR;
240 cscr = CSCR;
243 CSCR = cscr;
246 CSCR |= CSCR_MPLL_RESTART;
249 while( CSCR & CSCR_MPLL_RESTART );
291 bclk_div_at_boot = __mfld2val(CSCR_BCLK_DIV, CSCR) + 1;
294 if((CSCR & CSCR_MPEN) &&
H A Dgeneric.c123 u32 f_ref = (CSCR & CSCR_SYSTEM_SEL) ? 16000000 : (CLK32 * 512);
167 return imx_get_system_clk() / (((CSCR>>10) & 0xf)+1);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/pcmcia/
H A Dhd64465_ss.c109 #define CSCR 0x4 macro
443 * by propagating to the CSCR register
655 (cscr = hs_in(sp, CSCR)) & HD64465_PCCCSCR_PIREQ) {
657 hs_out(sp, cscr, CSCR);
676 cscr = hs_in(sp, CSCR);
722 hs_out(sp, cscr, CSCR);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/h8300/kernel/
H A Dsetup.c188 volatile unsigned char *cscr = (volatile unsigned char *)CSCR;
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-h8300/
H A Dregs306x.h27 #define CSCR 0xFEE01F macro
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/net/
H A D8139too.c325 CSCR = 0x74, /* Chip Status and Configuration Register. */ enumerator in enum:RTL8139_registers
1481 if (RTL_R16 (CSCR) & CSCR_LinkOKBit) {
1483 RTL_W16 (CSCR, CSCR_LinkDownOffCmd);
1488 RTL_W16 (CSCR, CSCR_LinkDownCmd);
1497 linkcase = RTL_R16 (CSCR) & CSCR_LinkStatusBits;
1526 if ((RTL_R16 (CSCR) &
2169 an first get an additional status bit from CSCR. */
2171 link_changed = RTL_R16 (CSCR) & CSCR_LinkChangeBit;
H A Dpci-skeleton.c264 CSCR = 0x74, /* Chip Status and Configuration Register. */ enumerator in enum:NETDRV_registers
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/net/usb/
H A Drtl8150.c44 #define CSCR 0x014C /* This one has the link status */ macro
762 get_registers(dev, CSCR, 2, &tmp);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/arch-imx/
H A Dimx-regs.h43 #define CSCR __REG(IMX_PLL_BASE) /* Clock Source Control Register */ macro

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