Searched refs:CLOCK (Results 1 - 13 of 13) sorted by relevance

/netgear-WNDR4500v2-V1.0.0.60_1.0.38/ap/gpl/timemachine/db-4.7.25.NC/test_micro/source/
H A Dbench.h143 #define TIMER_START CLOCK(__start_time)
144 #define TIMER_STOP CLOCK(__end_time)
147 #define CLOCK(tm) do { \ macro
152 #define CLOCK(tm) do { \ macro
159 #define CLOCK(tm) do { \ macro
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/ap/gpl/timemachine/db-4.7.25.NC/build_vxworks/test_micro/
H A Dbench.h143 #define TIMER_START CLOCK(__start_time)
144 #define TIMER_STOP CLOCK(__end_time)
147 #define CLOCK(tm) do { \ macro
152 #define CLOCK(tm) do { \ macro
159 #define CLOCK(tm) do { \ macro
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/ap/gpl/timemachine/db-4.7.25.NC/os/
H A Dos_clock.c66 NO AVAILABLE CLOCK IMPLEMENTATION
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/usb/misc/sisusbvga/
H A Dsisusb_struct.h121 unsigned short CLOCK; member in struct:SiS_VCLKData
H A Dsisusb_init.c653 VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK;
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/frv/kernel/
H A Dsetup.c487 #define CLOCK(SRC,RATIO) ((SRC) * (((RATIO) >> 4) & 0x0f) / ((RATIO) & 0x0f)) macro
492 __ext_bus_clock_speed_HZ = CLOCK(__clkin_clock_speed_HZ, mode->xbus);
493 __sdram_clock_speed_HZ = CLOCK(__clkin_clock_speed_HZ, mode->sdram);
494 __dsu_clock_speed_HZ = CLOCK(__clkin_clock_speed_HZ, mode->dsu);
498 __core_bus_clock_speed_HZ = CLOCK(__clkin_clock_speed_HZ, mode->corebus);
499 __core_clock_speed_HZ = CLOCK(__clkin_clock_speed_HZ, mode->core);
502 __core_bus_clock_speed_HZ = CLOCK(__clkin_clock_speed_HZ, mode->sdram);
503 __core_clock_speed_HZ = CLOCK(__clkin_clock_speed_HZ, mode->sdram);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/video/sis/
H A Dvstruct.h182 unsigned short CLOCK; member in struct:SiS_MCLKData
187 unsigned short CLOCK; member in struct:SiS_VCLKData
192 unsigned short CLOCK; member in struct:SiS_VBVCLKData
H A Dinitextlfb.c90 Clock = SiS_Pr->SiS_VCLKData[ClockIndex].CLOCK * 1000;
H A Dinit.c1554 return(SiS_Pr->SiS_MCLKData_0[index].CLOCK);
1556 return(SiS_Pr->SiS_MCLKData_1[index - 4].CLOCK);
1558 return(SiS_Pr->SiS_MCLKData_0[index].CLOCK);
2300 VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK;
2308 MCLK = SiS_Pr->SiS_MCLKData_0[index].CLOCK;
2422 VCLK = SiS_Pr->SiS_VCLKData[data].CLOCK;
2427 MCLK16 = SiS_Pr->SiS_MCLKData_0[data].CLOCK * 16;
2581 VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK;
2749 data2 = SiS_Pr->SiS_VCLKData[data2].CLOCK;
H A Dinit301.c1448 SiS_Pr->SiS_VBVCLKData[SiS_Pr->PanelVCLKIdx315].CLOCK,
1468 SiS_Pr->SiS_VCLKData[VCLK_CUSTOM_315].CLOCK =
1469 SiS_Pr->SiS_VBVCLKData[VCLK_CUSTOM_315].CLOCK = (unsigned short)((unsigned char)ROMAddr[18]);
1481 SiS_Pr->SiS_VBVCLKData[SiS_Pr->PanelVCLKIdx315].CLOCK,
1876 SiS_Pr->SiS_VCLKData[idx].CLOCK =
1877 SiS_Pr->SiS_VBVCLKData[idx].CLOCK = SiS_Pr->CP_PrefClock;
5087 VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK;
5114 MCLK = SiS_Pr->SiS_MCLKData_0[index].CLOCK;
5182 VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK;
10235 index = SiS_Pr->SiS_VCLKData[index].CLOCK;
[all...]
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/m68k/atari/
H A Datakeyb.c123 KEYBOARD, AMOUSE, RMOUSE, JOYSTICK, CLOCK, RESYNC enumerator in enum:kb_state_t
250 kb_state.state = CLOCK;
334 case CLOCK:
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/char/watchdog/
H A Drm9k_wdt.c42 #define CLOCK 125000000 macro
164 const u32 wdval = (to * CLOCK) & ~0x0000000f;
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/arch-sa1100/
H A Dh3600_gpio.h293 #define H3800_ASIC2_CLOCK_Enable H3800_ASIC2_OFFSET( u32, CLOCK, Enable )

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