Searched refs:CCR2 (Results 1 - 3 of 3) sorted by relevance
| /netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-sh/cpu-sh2a/ |
| H A D | cache.h | 16 #define CCR2 0xfffc1004 macro
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| /netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/net/wan/ |
| H A D | dscc4.c | 265 #define CCR2 0x10 macro
825 scc_writel(0x00050008 & ~RxActivate, dpriv, dev, CCR2);
827 //scc_writel(0x00250008 & ~RxActivate, dpriv, dev, CCR2);
1028 scc_patchl(0, 0x00050000, dpriv, dev, CCR2);
1043 * power-down mode or..." and CCR2.RAC = 1 are two different
1148 scc_patchl(0x00050000, 0, dpriv, dev, CCR2);
1587 scc_writel(0x08050008, dpriv, dev, CCR2);
1721 scc_patchl(RxActivate, 0, dpriv, dev, CCR2);
1773 scc_patchl(0, RxActivate, dpriv, dev, CCR2);
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| /netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/char/pcmcia/ |
| H A D | synclink_cs.c | 282 #define CCR2 0x2e macro
3124 * BGR[9..8] contained in CCR2[7..6]
3131 val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
3133 write_reg(info, (unsigned char) (channel + CCR2), val);
3187 /* CCR2 (Channel B)
3200 write_reg(info, CHB + CCR2, 0x38);
3202 write_reg(info, CHB + CCR2, 0x30);
3234 /* CCR2:04 SSEL Clock source select, 1=submode b */
3235 val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
3236 write_reg(info, CHA + CCR2, va
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