Searched refs:BIT15 (Results 1 - 8 of 8) sorted by relevance

/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/arch-integrator/
H A Dbits.h41 #define BIT15 0x00008000 macro
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/linux/
H A Dsynclink.h35 #define BIT15 0x8000 macro
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/char/
H A Dsynclink.c578 #define MISCSTATUS_RXC_LATCHED BIT15
598 #define SICR_RXC_ACTIVE BIT15
600 #define SICR_RXC (BIT15+BIT14)
655 #define DICR_MASTER BIT15
1871 usc_OutReg(info, PCR, (u16)((usc_InReg(info, PCR) | BIT15) | BIT14));
4768 RegValue |= BIT15;
4770 RegValue |= BIT15 + BIT14;
4812 case HDLC_ENCODING_BIPHASE_MARK: RegValue |= BIT15; break;
4813 case HDLC_ENCODING_BIPHASE_SPACE: RegValue |= BIT15 + BIT13; break;
4814 case HDLC_ENCODING_BIPHASE_LEVEL: RegValue |= BIT15
[all...]
H A Dsynclink_gt.c229 #define desc_complete(a) (le16_to_cpu((a).status) & BIT15)
4089 val = BIT15 + BIT14 + BIT0;
4126 case MGSL_MODE_BISYNC: val |= BIT15; break;
4192 case MGSL_MODE_BISYNC: val |= BIT15; break;
4298 wr_reg16(info, SCR, BIT15 + BIT14 + BIT0);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/scsi/
H A Dtmscsim.h178 #define BIT15 0x00008000 macro
H A Ddc395x.h57 #define BIT15 0x00008000 macro
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/net/
H A Dcs89x0.h468 #define BIT15 0x8000 macro
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/char/pcmcia/
H A Dsynclink_cs.c302 #define IRQ_BREAK_ON BIT15 // rx break detected

Completed in 202 milliseconds