| /netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-sparc/ |
| H A D | winmacro.h | 37 #define LOAD_PT_INS(base_reg) \
38 ldd [%base_reg + STACKFRAME_SZ + PT_I0], %i0; \
39 ldd [%base_reg + STACKFRAME_SZ + PT_I2], %i2; \
40 ldd [%base_reg + STACKFRAME_SZ + PT_I4], %i4; \
41 ldd [%base_reg + STACKFRAME_SZ + PT_I6], %i6;
43 #define LOAD_PT_GLOBALS(base_reg) \
44 ld [%base_reg + STACKFRAME_SZ + PT_G1], %g1; \
45 ldd [%base_reg + STACKFRAME_SZ + PT_G2], %g2; \
46 ldd [%base_reg + STACKFRAME_SZ + PT_G4], %g4; \
47 ldd [%base_reg
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| /netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/arch/arm/mach-omap2/ |
| H A D | irq.c | 35 unsigned long base_reg; member in struct:omap_irq_bank
40 .base_reg = OMAP24XX_IC_BASE,
48 omap_writel(0x1, irq_banks[0].base_reg + INTC_CONTROL);
61 omap_writel(1 << irq, irq_banks[0].base_reg + INTC_MIR_SET0 + offset);
74 omap_writel(1 << irq, irq_banks[0].base_reg + INTC_MIR_CLEAR0 + offset);
94 tmp = omap_readl(bank->base_reg + INTC_REVISION) & 0xff;
97 bank->base_reg, tmp >> 4, tmp & 0xf, bank->nr_irqs);
99 tmp = omap_readl(bank->base_reg + INTC_SYSCONFIG);
101 omap_writel(tmp, bank->base_reg + INTC_SYSCONFIG);
103 while (!(omap_readl(bank->base_reg
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| /netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/arch/ppc/syslib/ |
| H A D | mv64x60_win.c | 41 .base_reg = MV64x60_CPU2MEM_0_BASE,
49 .base_reg = MV64x60_CPU2MEM_1_BASE,
57 .base_reg = MV64x60_CPU2MEM_2_BASE,
65 .base_reg = MV64x60_CPU2MEM_3_BASE,
74 .base_reg = MV64x60_CPU2DEV_0_BASE,
82 .base_reg = MV64x60_CPU2DEV_1_BASE,
90 .base_reg = MV64x60_CPU2DEV_2_BASE,
98 .base_reg = MV64x60_CPU2DEV_3_BASE,
107 .base_reg = MV64x60_CPU2BOOT_0_BASE,
116 .base_reg
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| H A D | mv64x60.c | 641 u32 val, base_reg, size_reg, base_bits, size_bits; local
644 base_reg = bh->ci->window_tab_32bit[window].base_reg;
646 if (base_reg != 0) {
652 val = mv64x60_read(bh, base_reg);
679 u32 val, base_reg, size_reg, base_bits, size_bits; local
685 base_reg = bh->ci->window_tab_32bit[window].base_reg;
687 if (base_reg != 0) {
694 mv64x60_write(bh, base_reg, va
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| /netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/arch/arm/mach-omap1/ |
| H A D | irq.c | 56 unsigned long base_reg; member in struct:omap_irq_bank
66 return omap_readl(irq_banks[bank].base_reg + offset);
71 omap_writel(value, irq_banks[bank].base_reg + offset);
87 l = omap_readl(irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET);
89 omap_writel(l, irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET);
97 l = omap_readl(irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET);
99 omap_writel(l, irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET);
143 { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3f8e22f },
144 { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb9c1f2 },
145 { .base_reg
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| /netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/arch/mips/mm/ |
| H A D | pg-sb1.c | 221 void *base_reg = IOADDR(A_DM_REGISTER(i, R_DM_DSCR_BASE)); local
223 __raw_writeq(base_val, base_reg);
224 __raw_writeq(base_val | M_DM_DSCR_BASE_RESET, base_reg);
225 __raw_writeq(base_val | M_DM_DSCR_BASE_ENABL, base_reg);
|
| /netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/drivers/media/dvb/frontends/ |
| H A D | dibx000_common.c | 29 return dibx000_write_word(mst, mst->base_reg + 4, intf);
47 tx[0] = (((mst->base_reg + 1) >> 8) & 0xff);
48 tx[1] = ( (mst->base_reg + 1) & 0xff);
130 mst->base_reg = 1024;
132 mst->base_reg = 768;
|
| H A D | dibx000_common.h | 25 u16 base_reg; member in struct:dibx000_i2c_master
|
| /netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/drivers/kvm/ |
| H A D | x86_emulate.c | 483 int use_modrm_ea, index_reg = 0, base_reg = 0, scale, rip_relative = 0; local
562 modrm_rm = base_reg = (b & 1) << 3; /* REG.B */
654 base_reg |= sib & 7;
657 switch (base_reg) {
660 modrm_ea += _regs[base_reg];
665 modrm_ea += _regs[base_reg];
|
| /netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-ppc/ |
| H A D | mv64x60.h | 188 u32 base_reg; member in struct:mv64x60_32bit_window
|