Searched refs:__region_CS2 (Results 1 - 6 of 6) sorted by relevance
| /netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-frv/ |
| H A D | mb-regs.h | 47 #define __region_CS2 0xe0000000 /* SLBUS/PCI I/O space */ macro
69 #define __region_PCI_IO (__region_CS2 + 0x04000000UL)
70 #define __region_PCI_MEM (__region_CS2 + 0x08000000UL)
85 #define __get_CLKSW() ({ *(volatile unsigned long *)(__region_CS2 + 0x0130000cUL) & 0xffUL; })
92 #define __addr_LEDS() (__region_CS2 + 0x01200004UL)
103 #define __addr_LCD() (__region_CS2 + 0x01200008UL)
144 #define __region_CS2 0x20000000 /* FPGA registers */ macro
174 #define __addr_LEDS() (__region_CS2 + 0x00000023UL)
177 #define __addr_FPGATR() (__region_CS2 + 0x00000030UL)
194 #define __addr_FPGA_SWR ((volatile void __iomem *)(__region_CS2
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| /netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/arch/frv/mb93090-mb00/ |
| H A D | pci-vdk.c | 388 __reg_MB86943_ecs_base(1) = ((__region_CS2 + 0x01000000) >> 9) | 0x08000000;
389 __reg_MB86943_ecs_base(2) = ((__region_CS2 + 0x00000000) >> 9) | 0x08000000;
394 __reg_MB86943_sl_pci_io_base = (__region_CS2 + 0x04000000) >> 9;
395 __reg_MB86943_sl_pci_mem_base = (__region_CS2 + 0x08000000) >> 9;
396 __reg_MB86943_pci_sl_io_base = __region_CS2 + 0x04000000;
397 __reg_MB86943_pci_sl_mem_base = __region_CS2 + 0x08000000;
400 *(volatile unsigned long *)(__region_CS2+0x01300014) == 1;
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| /netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/arch/frv/kernel/ |
| H A D | irq-mb93093.c | 28 #define __reg16(ADDR) (*(volatile unsigned short *)(__region_CS2 + (ADDR)))
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| H A D | head-uc-fr401.S | 108 sethi.p %hi(__region_CS2),gr4
109 setlo %lo(__region_CS2),gr4
166 sethi.p %hi(LED_ADDR - 0x20000000 +__region_CS2),gr30
167 setlo %lo(LED_ADDR - 0x20000000 +__region_CS2),gr30
272 sethi.p %hi(__region_CS2),gr4
273 setlo %lo(__region_CS2),gr4
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| H A D | head-mmu-fr451.S | 101 sethi.p %hi(__region_CS2),gr4
102 setlo %lo(__region_CS2),gr4
160 sethi.p %hi(__region_CS2 + 0x01200004),gr30
161 setlo %lo(__region_CS2 + 0x01200004),gr30
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| H A D | head-uc-fr555.S | 94 sethi.p %hi(__region_CS2),gr4
95 setlo %lo(__region_CS2),gr4
153 sethi.p %hi(LED_ADDR - 0x20000000 +__region_CS2),gr30
154 setlo %lo(LED_ADDR - 0x20000000 +__region_CS2),gr30
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