Searched refs:PNX8550_CM_PLL0_CTL (Results 1 - 3 of 3) sorted by relevance

/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-mips/mach-pnx8550/
H A Dcm.h27 #define PNX8550_CM_PLL0_CTL *(volatile unsigned long *)(PNX8550_CM_BASE + 0x000) macro
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm/mach-pnx8550/
H A Dcm.h27 #define PNX8550_CM_PLL0_CTL *(volatile unsigned long *)(PNX8550_CM_BASE + 0x000) macro
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/arch/mips/philips/pnx8550/common/
H A Dtime.c67 n = (PNX8550_CM_PLL0_CTL & PNX8550_CM_PLL_N_MASK) >> 16;
68 m = (PNX8550_CM_PLL0_CTL & PNX8550_CM_PLL_M_MASK) >> 8;
69 p = (PNX8550_CM_PLL0_CTL & PNX8550_CM_PLL_P_MASK) >> 2;

Completed in 161 milliseconds