Searched refs:PLD_BASE (Results 1 - 6 of 6) sorted by relevance

/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-m32r/mappi3/
H A Dmappi3_pld.h16 #define PLD_BASE (0x1c000000 /* + NONCACHE_OFFSET */) macro
21 #define PLD_BASE (0x1c000000 + NONCACHE_OFFSET) macro
28 #define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000)
29 #define PLD_CFSTS __reg16(PLD_BASE + 0x0002)
30 #define PLD_CFIMASK __reg16(PLD_BASE + 0x0004)
31 #define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006)
32 #define PLD_CFCR0 __reg16(PLD_BASE + 0x000a)
33 #define PLD_CFCR1 __reg16(PLD_BASE + 0x000c)
36 #define PLD_MMCCR __reg16(PLD_BASE + 0x4000)
37 #define PLD_MMCMOD __reg16(PLD_BASE
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/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-m32r/mappi2/
H A Dmappi2_pld.h16 #define PLD_BASE (0x10c00000 /* + NONCACHE_OFFSET */) macro
21 #define PLD_BASE (0x10c00000 + NONCACHE_OFFSET) macro
28 #define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000)
29 #define PLD_CFSTS __reg16(PLD_BASE + 0x0002)
30 #define PLD_CFIMASK __reg16(PLD_BASE + 0x0004)
31 #define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006)
32 #define PLD_CFCR0 __reg16(PLD_BASE + 0x000a)
33 #define PLD_CFCR1 __reg16(PLD_BASE + 0x000c)
36 #define PLD_MMCCR __reg16(PLD_BASE + 0x4000)
37 #define PLD_MMCMOD __reg16(PLD_BASE
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/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-m32r/m32104ut/
H A Dm32104ut_pld.h28 #define PLD_BASE (PLD_PLAT_BASE /* + NONCACHE_OFFSET */) macro
33 #define PLD_BASE (PLD_PLAT_BASE + NONCACHE_OFFSET) macro
40 #define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000)
41 #define PLD_CFSTS __reg16(PLD_BASE + 0x0002)
42 #define PLD_CFIMASK __reg16(PLD_BASE + 0x0004)
43 #define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006)
46 #define PLD_MMCCR __reg16(PLD_BASE + 0x4000)
47 #define PLD_MMCMOD __reg16(PLD_BASE + 0x4002)
48 #define PLD_MMCSTS __reg16(PLD_BASE + 0x4006)
49 #define PLD_MMCBAUR __reg16(PLD_BASE
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/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-m32r/m32700ut/
H A Dm32700ut_pld.h28 #define PLD_BASE (PLD_PLAT_BASE /* + NONCACHE_OFFSET */) macro
33 #define PLD_BASE (PLD_PLAT_BASE + NONCACHE_OFFSET) macro
40 #define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000)
41 #define PLD_CFSTS __reg16(PLD_BASE + 0x0002)
42 #define PLD_CFIMASK __reg16(PLD_BASE + 0x0004)
43 #define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006)
44 #define PLD_CFVENCR __reg16(PLD_BASE + 0x0008)
45 #define PLD_CFCR0 __reg16(PLD_BASE + 0x000a)
46 #define PLD_CFCR1 __reg16(PLD_BASE + 0x000c)
47 #define PLD_IDERSTCR __reg16(PLD_BASE
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/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-m32r/opsput/
H A Dopsput_pld.h22 #define PLD_BASE (PLD_PLAT_BASE /* + NONCACHE_OFFSET */) macro
27 #define PLD_BASE (PLD_PLAT_BASE + NONCACHE_OFFSET) macro
34 #define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000)
35 #define PLD_CFSTS __reg16(PLD_BASE + 0x0002)
36 #define PLD_CFIMASK __reg16(PLD_BASE + 0x0004)
37 #define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006)
38 #define PLD_CFVENCR __reg16(PLD_BASE + 0x0008)
39 #define PLD_CFCR0 __reg16(PLD_BASE + 0x000a)
40 #define PLD_CFCR1 __reg16(PLD_BASE + 0x000c)
41 #define PLD_IDERSTCR __reg16(PLD_BASE
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/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/arch/m32r/boot/compressed/
H A Dm32r_sio.c35 #undef PLD_BASE macro
37 #define PLD_BASE 0x1cc00000 macro
39 #define PLD_BASE 0xa4c00000 macro

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