Searched refs:FIFO (Results 1 - 12 of 12) sorted by relevance

/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-arm/arch-lh7a40x/
H A Ddebug-macro.S31 tst \rd, #1 << 3 @ BUSY (TX FIFO not empty)
35 .macro waituart,rd,rx @ wait for Tx FIFO room
37 tst \rd, #1 << 5 @ TXFF (TX FIFO full)
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/drivers/video/nvidia/
H A Dnv_local.h92 NV_WR32(&(par)->FIFO[0x0010], 0, (data) << 2); \
96 #define READ_GET(par) (NV_RD32(&(par)->FIFO[0x0011], 0) >> 2)
H A Dnv_type.h170 volatile u32 __iomem *FIFO; member in struct:nvidia_par
H A Dnv_setup.c303 par->FIFO = par->REGS + (0x00800000 / 4);
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-arm/arch-s3c2410/
H A Ddebug-macro.S40 @ FIFO enabled...
43 @ devices have an 64 byte FIFO identical to the s3c2440
77 @ FIFO enabled...
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/drivers/video/riva/
H A Driva_hw.c1366 LOAD_FIXED_STATE(nv4,FIFO);
1368 chip->Tri05 = (RivaTexturedTriangle05 __iomem *)&(chip->FIFO[0x0000E000/4]);
1377 LOAD_FIXED_STATE(nv10,FIFO);
1379 chip->Tri05 = (RivaTexturedTriangle05 __iomem *)&(chip->FIFO[0x0000E000/4]);
1412 chip->Tri03 = (RivaTexturedTriangle03 __iomem *)&(chip->FIFO[0x0000E000/4]);
1451 chip->Tri03 = (RivaTexturedTriangle03 __iomem *)&(chip->FIFO[0x0000E000/4]);
1456 chip->Tri03 = (RivaTexturedTriangle03 __iomem *)&(chip->FIFO[0x0000E000/4]);
1497 chip->Tri03 = (RivaTexturedTriangle03 __iomem *)&(chip->FIFO[0x0000E000/4]);
1502 chip->Tri03 = (RivaTexturedTriangle03 __iomem *)&(chip->FIFO[0x0000E000/4]);
1660 LOAD_FIXED_STATE(Riva,FIFO);
[all...]
H A Dnv_driver.c336 par->riva.FIFO =
H A Driva_hw.h100 * FIFO registers. *
442 * Non-FIFO registers.
454 volatile U032 __iomem *FIFO; member in struct:_riva_hw_inst
478 * FIFO registers.
551 * FIFO Free Count. Should attempt to yield processor if RIVA is busy.
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-sparc64/
H A Dfloppy.h443 #define FIFO (port + 5) macro
462 sun_pci_fd_out_byte(port, 0x08, FIFO);
473 result[i++] = inb(FIFO);
508 sun_pci_fd_out_byte(port, 0x07, FIFO);
509 sun_pci_fd_out_byte(port, drive & 0x03, FIFO);
524 #undef FIFO macro
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/linux/
H A Dparport_pc.h11 #define FIFO(p) ((p)->base_hi + 0x0) macro
28 /* Number of PWords that FIFO will hold. */
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/drivers/parport/
H A Dparport_pc.c135 -EBUSY: Could not drain FIFO in some finite amount of time,
157 /* This mode resets the FIFO, so we may
162 case ECR_PPF: /* Parallel Port FIFO mode */
175 /* The FIFO is stuck. */
199 /* Find FIFO lossage; FIFO is reset */
201 #endif /* FIFO support */
280 * nFault is 0 if there is at least 1 byte in the Warp's FIFO
281 * pError is 1 if there are 16 bytes in the Warp's FIFO
485 const int fifo = FIFO (por
[all...]
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/drivers/scsi/
H A DFlashPoint.c517 #define FIFO BITW(4) macro
1773 if (hp_int & (FIFO | TIMEOUT | RESET | SCAM_SEL) || bm_status) {
1779 (FIFO | TIMEOUT | RESET | SCAM_SEL));
2091 else if (p_int & FIFO) {
2093 WRW_HARPOON((p_port + hp_intstat), FIFO);
4383 * Function: Phase Check FIFO
4598 WRW_HARPOON(map_addr, (TCB_OP + FIFO_0 + DI)); /*JUMP IF NO DATA IN FIFO */

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