Searched refs:DCR (Results 1 - 6 of 6) sorted by relevance
| /netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-sh64/ |
| H A D | registers.h | 40 #define DCR cr16 macro
99 #define __DCR __str(DCR)
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| /netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/drivers/net/wan/ |
| H A D | hd64570.h | 141 #define DCR 0x15 /* DMA Command */ macro
142 #define DCR_RX(node) (DCR + (node ? DMAC1RX_OFFSET : DMAC0RX_OFFSET))
143 #define DCR_TX(node) (DCR + (node ? DMAC1TX_OFFSET : DMAC0TX_OFFSET))
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| /netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/arch/arm/mach-imx/ |
| H A D | dma.c | 560 DCR = DCR_DRST;
575 DCR = DCR_DEN;
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| /netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/arch/sh64/kernel/ |
| H A D | entry.S | 435 putcon SP, DCR
480 getcon DCR, SP
493 putcon SP, DCR
520 getcon DCR, SP
1832 /* On entry, former r15 (SP) is in DCR
1836 DCR is the only register whose value is lost altogether.
1962 getcon DCR, SP
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| /netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-arm/arch-imx/ |
| H A D | imx-regs.h | 280 #define DCR __REG(IMX_DMAC_BASE +0x00) /* DMA Control Register */ macro
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| /netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/drivers/char/ |
| H A D | synclink.c | 397 #define DCR 0x06 /* DMA Control Register (shared) */ macro
5111 /* DMA Control Register (DCR)
5117 * <13> 1 Enable Priority Preempt per DCR<15..14>
5118 * (WARNING DCR<11..10> must be 00 when this is 1)
5119 * 0 Choose activate channel per DCR<11..10>
5135 usc_OutDmaReg( info, DCR, 0xa00b );
5138 usc_OutDmaReg( info, DCR, 0x800b );
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