Searched refs:A_IMR_CPU0_BASE (Results 1 - 3 of 3) sorted by relevance

/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/arch/mips/sibyte/sb1250/
H A Dsmp.c32 IOADDR(A_IMR_CPU0_BASE + R_IMR_MAILBOX_SET_CPU),
37 IOADDR(A_IMR_CPU0_BASE + R_IMR_MAILBOX_CLR_CPU),
42 IOADDR(A_IMR_CPU0_BASE + R_IMR_MAILBOX_CPU),
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-mips/sibyte/
H A Dsb1250_regs.h700 #define A_IMR_CPU0_BASE 0x0010020000 macro
705 #define A_IMR_MAPPER(cpu) (A_IMR_CPU0_BASE+(cpu)*IMR_REGISTER_SPACING)
732 (A_IMR_CPU0_BASE + (cpu * IMR_REGISTER_SPACING) + reg)
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm/sibyte/
H A Dsb1250_regs.h700 #define A_IMR_CPU0_BASE 0x0010020000 macro
705 #define A_IMR_MAPPER(cpu) (A_IMR_CPU0_BASE+(cpu)*IMR_REGISTER_SPACING)
732 (A_IMR_CPU0_BASE + (cpu * IMR_REGISTER_SPACING) + reg)

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