Searched refs:AT91_SDRAMC (Results 1 - 4 of 4) sorted by relevance

/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-arm/arch-at91/
H A Dat91sam926x_mc.h17 #define AT91_SDRAMC_MR (AT91_SDRAMC + 0x00) /* SDRAM Controller Mode Register */
27 #define AT91_SDRAMC_TR (AT91_SDRAMC + 0x04) /* SDRAM Controller Refresh Timer Register */
30 #define AT91_SDRAMC_CR (AT91_SDRAMC + 0x08) /* SDRAM Controller Configuration Register */
57 #define AT91_SDRAMC_LPR (AT91_SDRAMC + 0x10) /* SDRAM Controller Low Power Register */
71 #define AT91_SDRAMC_IER (AT91_SDRAMC + 0x14) /* SDRAM Controller Interrupt Enable Register */
72 #define AT91_SDRAMC_IDR (AT91_SDRAMC + 0x18) /* SDRAM Controller Interrupt Disable Register */
73 #define AT91_SDRAMC_IMR (AT91_SDRAMC + 0x1C) /* SDRAM Controller Interrupt Mask Register */
74 #define AT91_SDRAMC_ISR (AT91_SDRAMC + 0x20) /* SDRAM Controller Interrupt Status Register */
77 #define AT91_SDRAMC_MDR (AT91_SDRAMC + 0x24) /* SDRAM Memory Device Register */
H A Dat91sam9261.h71 #define AT91_SDRAMC (0xffffea00 - AT91_BASE_SYS) macro
H A Dat91sam9260.h85 #define AT91_SDRAMC (0xffffea00 - AT91_BASE_SYS) macro
H A Dat91sam9rl.h77 #define AT91_SDRAMC (0xffffea00 - AT91_BASE_SYS) macro

Completed in 97 milliseconds