Searched refs:AND_REG (Results 1 - 12 of 12) sorted by relevance

/netgear-WNDR4500-V1.0.1.40_1.0.68/src/include/
H A Dosl.h122 #ifndef AND_REG
123 #define AND_REG(osh, r, v) W_REG(osh, (r), R_REG(osh, r) & (v)) macro
124 #endif /* !AND_REG */
H A Dmin_osl.h110 #define AND_REG(osh, r, v) W_REG(osh, (r), R_REG(osh, r) & (v)) macro
H A Dcfe_osl.h99 #define AND_REG(osh, r, v) W_REG(osh, (r), R_REG(osh, r) & (v)) macro
H A Dlinux_osl.h317 #define AND_REG(osh, r, v) W_REG(osh, (r), R_REG(osh, r) & (v)) macro
681 #define AND_REG(osh, r, v) W_REG(osh, (r), R_REG(osh, r) & (v)) macro
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/shared/
H A Dhndpmu.c117 AND_REG(si_osh(sih), &cc->min_res_mask, ~(res_mask));
118 AND_REG(si_osh(sih), &cc->max_res_mask, ~(res_mask));
1155 AND_REG(osh, &cc->res_dep_mask,
1377 AND_REG(osh, &cc->min_res_mask, ~PMURES_BIT(RES4328_BB_PLL_PU));
1378 AND_REG(osh, &cc->max_res_mask, ~PMURES_BIT(RES4328_BB_PLL_PU));
1381 AND_REG(osh, &cc->min_res_mask, ~PMURES_BIT(RES5354_BB_PLL_PU));
1382 AND_REG(osh, &cc->max_res_mask, ~PMURES_BIT(RES5354_BB_PLL_PU));
1485 AND_REG(osh, &cc->min_res_mask, ~(PMURES_BIT(RES4313_HT_AVAIL_RSRC)));
1488 AND_REG(osh, &cc->max_res_mask, ~(PMURES_BIT(RES4313_HT_AVAIL_RSRC)));
1824 AND_REG(os
[all...]
H A Dsflash.c372 AND_REG(osh, &cc->gpioout, ~mask);
393 AND_REG(osh, &cc->gpioout, ~mask);
H A Dhndchipc.c98 AND_REG(osh, &cc->corecontrol, ~CC_UARTCLKEN);
H A Dbcmotp.c837 AND_REG(oi->osh, &cc->otpcontrol, ~OTPC_PROGEN);
1022 AND_REG(oi->osh, &cc->otpcontrol, ~OTPC_PROGEN);
1133 AND_REG(oi->osh, &cc->otpcontrol, ~OTPC_PROGEN);
1294 AND_REG(oi->osh, &cc->otpcontrol, ~OTPC_PROGEN);
H A Dhnddma.c752 AND_REG(osh, &dma32regs->control, ~XC_AE);
1699 AND_REG(di->osh, &di->d32txregs->control, ~XC_SE);
1735 AND_REG(di->osh, &di->d32txregs->control, ~XC_FL);
2293 AND_REG(di->osh, &di->d64txregs->control, ~D64_XC_SE);
2330 AND_REG(di->osh, &di->d64txregs->control, ~D64_XC_FL);
2898 AND_REG(osh, &dma64regs->control, ~D64_XC_AE);
H A Dhndmips.c184 AND_REG(osh, &((mips74kregs_t *)regs)->intmask[0], ~(1 << flag));
195 AND_REG(osh, &sb->sbintvec, ~(1 << flag));
H A Dhndpci.c794 AND_REG(osh, &sb->sbimconfiglow, ~0x00000070);
H A Dsiutils.c183 /* AND_REG(sii->osh, &cc->regcontrol_data, ~0x80); */
2009 AND_REG(sii->osh, &cc->system_clk_ctl, ~SYCC_HR);
2011 AND_REG(sii->osh, &cc->clk_ctl_st, ~CCS_FORCEHT);

Completed in 203 milliseconds