Searched refs:data_fifo (Results 1 - 9 of 9) sorted by relevance

/netgear-R7800-V1.0.2.28/target/linux/lantiq/files/drivers/usb/ifxhcd/
H A Difxhcd_es.c53 uint32_t *data_fifo = _core_if->data_fifo[0]; local
159 ifxusb_wreg(data_fifo++, 0x01000680);
160 ifxusb_wreg(data_fifo++, 0x00080000);
210 uint32_t *data_fifo = _core_if->data_fifo[0]; local
342 (void)ifxusb_rreg(data_fifo++);
H A Difxusb_cif.h215 uint32_t *data_fifo[MAX_EPS_CHANNELS]; /*!< pointer to FIFO access windows, offset at 1000h */ member in struct:ifxusb_core_if
H A Difxusb_cif.c261 _core_if->data_fifo[i] = fifo_base + (i * IFXUSB_DATA_FIFO_SIZE);
262 IFX_DEBUGPL(DBG_CILV, "data_fifo[%d]=0x%08x\n",
263 i, (unsigned)_core_if->data_fifo[i]);
335 if( _core_if->data_fifo[0] != NULL) iounmap(_core_if->data_fifo[0] );
/netgear-R7800-V1.0.2.28/target/linux/lantiq/files/drivers/usb/dwc_otg/
H A Ddwc_otg_cil.c159 core_if->data_fifo[i] =
162 DWC_DEBUGPL(DBG_CILV, "data_fifo[%d]=0x%08x\n",
163 i, (unsigned)core_if->data_fifo[i]);
1787 uint32_t *data_fifo = _core_if->data_fifo[_hc->hc_num]; local
1801 dwc_write_reg32(data_fifo, *data_buff);
1806 dwc_write_reg32(data_fifo, get_unaligned(data_buff));
1840 _dest[0] = dwc_read_reg32(_core_if->data_fifo[0]);
1841 _dest[1] = dwc_read_reg32(_core_if->data_fifo[0]);
1842 //_dest[0] = dwc_read_datafifo32(_core_if->data_fifo[
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H A Ddwc_otg_hcd.c1095 uint32_t *data_fifo; variable
1202 data_fifo = (uint32_t *)((char *)global_regs + 0x1000);
1203 dwc_write_reg32(data_fifo++, 0x01000680);
1204 dwc_write_reg32(data_fifo++, 0x00080000);
1379 data_fifo = (uint32_t *)((char *)global_regs + 0x1000);
1382 (void)dwc_read_reg32(data_fifo++);
1901 data_fifo = (uint32_t *)((char *)global_regs + 0x1000);
H A Ddwc_otg_cil.h580 uint32_t *data_fifo[MAX_EPS_CHANNELS]; member in struct:dwc_otg_core_if
/netgear-R7800-V1.0.2.28/target/linux/ramips/files/drivers/usb/dwc_otg/
H A Ddwc_otg_hcd.c1171 uint32_t *data_fifo; variable
1278 data_fifo = (uint32_t *)((char *)global_regs + 0x1000);
1279 dwc_write_reg32(data_fifo++, 0x01000680);
1280 dwc_write_reg32(data_fifo++, 0x00080000);
1455 data_fifo = (uint32_t *)((char *)global_regs + 0x1000);
1458 (void)dwc_read_reg32(data_fifo++);
1961 data_fifo = (uint32_t *)((char *)global_regs + 0x1000);
H A Ddwc_otg_cil.c174 core_if->data_fifo[i] =
177 DWC_DEBUGPL(DBG_CILV, "data_fifo[%d]=0x%08x\n",
178 i, (unsigned)core_if->data_fifo[i]);
1984 uint32_t *data_fifo = core_if->data_fifo[hc->hc_num]; local
2000 dwc_write_reg32(data_fifo, *data_buff);
2007 dwc_write_reg32(data_fifo, get_unaligned(data_buff));
2041 dest[0] = dwc_read_reg32(core_if->data_fifo[0]);
2042 dest[1] = dwc_read_reg32(core_if->data_fifo[0]);
3014 fifo = core_if->data_fifo[e
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H A Ddwc_otg_cil.h686 uint32_t *data_fifo[MAX_EPS_CHANNELS]; member in struct:dwc_otg_core_if

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