/netgear-R7800-V1.0.2.28/target/linux/lantiq/files/drivers/usb/ifxhcd/ |
H A D | ifxhcd_es.c | 69 gintsts.d32 = ifxusb_rreg(&global_regs->gintsts); 70 //fprintf(stderr, "GINTSTS: %08x\n", gintsts.d32); 73 haint.d32 = ifxusb_rreg(&hc_global_regs->haint); 74 //fprintf(stderr, "HAINT: %08x\n", haint.d32); 77 hcint.d32 = ifxusb_rreg(&hc_regs->hcint); 78 //fprintf(stderr, "HCINT: %08x\n", hcint.d32); 81 hcchar.d32 = ifxusb_rreg(&hc_regs->hcchar); 82 //fprintf(stderr, "HCCHAR: %08x\n", hcchar.d32); 85 ifxusb_wreg(&hc_regs->hcint, hcint.d32); 88 ifxusb_wreg(&hc_global_regs->haint, haint.d32); [all...] |
H A D | ifxusb_regs.h | 275 uint32_t d32; member in union:gotgctl_data 299 uint32_t d32; member in union:gotgint_data 320 uint32_t d32; member in union:gahbcfg_data 347 uint32_t d32; member in union:gusbcfg_data 379 uint32_t d32; member in union:grstctl_data 436 uint32_t d32; member in union:gint_data 480 uint32_t d32; member in union:grxsts_data 514 uint32_t d32; member in union:fifosize_data 528 uint32_t d32; member in union:gnptxsts_data 555 uint32_t d32; member in union:dtxfsts_data 569 uint32_t d32; member in union:gi2cctl_data 591 uint32_t d32; member in union:hwcfg1_data 623 uint32_t d32; member in union:hwcfg2_data 666 uint32_t d32; member in union:hwcfg3_data 688 uint32_t d32; member in union:hwcfg4_data 753 uint32_t d32; member in union:dcfg_data 779 uint32_t d32; member in union:dctl_data 805 uint32_t d32; member in union:dsts_data 827 uint32_t d32; member in union:diepint_data 853 uint32_t d32; member in union:doepint_data 880 uint32_t d32; member in union:daint_data 931 uint32_t d32; member in union:dtknq1_data 947 uint32_t d32; member in union:dthrctl_data 1016 uint32_t d32; member in union:depctl_data 1052 uint32_t d32; member in union:deptsiz_data 1104 uint32_t d32; /*!< DMA Descriptor data buffer pointer */ member in union:desc_sts_data 1138 uint32_t d32; member in union:hcfg_data 1155 uint32_t d32; member in union:hfir_data 1168 uint32_t d32; member in union:hfnum_data 1183 uint32_t d32; member in union:hptxsts_data 1211 uint32_t d32; member in union:hprt0_data 1240 uint32_t d32; member in union:haint_data 1296 uint32_t d32; member in union:hcchar_data 1318 uint32_t d32; member in union:hcsplt_data 1339 uint32_t d32; member in union:hcint_data 1364 uint32_t d32; member in union:hctsiz_data 1405 uint32_t d32; member in union:pcgcctl_data [all...] |
H A D | ifxusb_cif_d.c | 57 dcfg.d32 = ifxusb_rreg(&_core_if->dev_global_regs->dcfg); 59 ifxusb_wreg(&_core_if->dev_global_regs->dcfg, dcfg.d32); 69 gint_data_t intr_mask ={ .d32 = 0}; 97 ifxusb_mreg( &global_regs->gintmsk, intr_mask.d32, intr_mask.d32); 109 dsts.d32 = ifxusb_rreg(&_core_if->dev_global_regs->dsts); 127 depctl.d32 = ifxusb_rreg(depctl_addr); 133 ifxusb_wreg(depctl_addr, depctl.d32); 151 depctl.d32 = ifxusb_rreg(depctl_addr); 164 ifxusb_wreg(depctl_addr, depctl.d32); [all...] |
H A D | ifxhcd_intr.c | 35 hcint_data_t hcint_clear = {.d32 = 0}; \ 37 ifxusb_wreg(&((_hc_regs_)->hcint), hcint_clear.d32); \ 49 hcint_data_t hcintmsk = {.d32 = 0}; \ 51 ifxusb_mreg(&((_hc_regs_)->hcintmsk), hcintmsk.d32, 0); \ 56 hcint_data_t hcintmsk = {.d32 = 0}; \ 58 ifxusb_mreg(&((_hc_regs_)->hcintmsk),0, hcintmsk.d32); \ 69 hctsiz.d32 = ifxusb_rreg(&_hc_regs->hctsiz); 345 hctsiz.d32 = ifxusb_rreg(&_hc_regs->hctsiz); 388 hctsiz.d32 = ifxusb_rreg(&_hc_regs->hctsiz); 539 hcint_data_t hcint = {.d32 [all...] |
H A D | ifxhcd.c | 240 gint_data_t intr = { .d32 = 0 }; 244 ifxusb_mreg (&_ifxhcd->core_if.core_global_regs->gintmsk, intr.d32, 0); 245 ifxusb_mreg (&_ifxhcd->core_if.core_global_regs->gintsts, intr.d32, 0); 267 hcchar.d32 = ifxusb_rreg(&hc_regs->hcchar); 272 ifxusb_wreg(&hc_regs->hcchar, hcchar.d32); 500 ifxhcd->flags.d32 = 0; 534 hprt0.d32 = ifxusb_read_hprt0(core_if); 540 ifxusb_wreg(core_if->hprt0, hprt0.d32); 555 hprt0_data_t hprt0 = { .d32=0 }; 579 ifxusb_wreg(ifxhcd->core_if.hprt0, hprt0.d32); [all...] |
H A D | ifxusb_cif_h.c | 56 gint_data_t intr_mask ={ .d32 = 0}; 81 ifxusb_mreg( &global_regs->gintmsk, intr_mask.d32, intr_mask.d32); 100 gint_data_t intr_mask ={.d32 = 0}; 114 ifxusb_mreg(&global_regs->gintmsk, intr_mask.d32, 0); 130 gusbcfg_data_t usbcfg ={.d32 = 0}; 131 gahbcfg_data_t ahbcfg ={.d32 = 0}; 132 gotgctl_data_t gotgctl ={.d32 = 0}; 157 usbcfg.d32 = ifxusb_rreg(&global_regs->gusbcfg); 160 ifxusb_wreg (&global_regs->gusbcfg, usbcfg.d32); [all...] |
H A D | ifxusb_cif.c | 273 _core_if->hwcfg1.d32 = ifxusb_rreg(&_core_if->core_global_regs->ghwcfg1); 274 _core_if->hwcfg2.d32 = ifxusb_rreg(&_core_if->core_global_regs->ghwcfg2); 275 _core_if->hwcfg3.d32 = ifxusb_rreg(&_core_if->core_global_regs->ghwcfg3); 276 _core_if->hwcfg4.d32 = ifxusb_rreg(&_core_if->core_global_regs->ghwcfg4); 278 IFX_DEBUGPL(DBG_CILV,"hwcfg1=%08x\n",_core_if->hwcfg1.d32); 279 IFX_DEBUGPL(DBG_CILV,"hwcfg2=%08x\n",_core_if->hwcfg2.d32); 280 IFX_DEBUGPL(DBG_CILV,"hwcfg3=%08x\n",_core_if->hwcfg3.d32); 281 IFX_DEBUGPL(DBG_CILV,"hwcfg4=%08x\n",_core_if->hwcfg4.d32); 354 gahbcfg_data_t ahbcfg ={ .d32 = 0}; 356 ifxusb_mreg(&_core_if->core_global_regs->gahbcfg, 0, ahbcfg.d32); [all...] |
H A D | ifxusb_ctl.c | 522 val.d32 = ifxusb_rreg(ifxusb_hcd_1.core_if.hprt0); 528 val.d32 = ifxusb_rreg(ifxusb_hcd_2.core_if.hprt0); 562 val.d32 = ifxusb_rreg(ifxusb_hcd.core_if.hprt0); 589 val.d32 = ifxusb_rreg(ifxusb_hcd_1.core_if.hprt0); 595 val.d32 = ifxusb_rreg(ifxusb_hcd_2.core_if.hprt0); 629 val.d32 = ifxusb_rreg(ifxusb_hcd.core_if.hprt0); 656 val.d32 = ifxusb_rreg(ifxusb_hcd_1.core_if.hprt0); 665 val.d32 = ifxusb_rreg(ifxusb_hcd_2.core_if.hprt0); 702 val.d32 = ifxusb_rreg(ifxusb_hcd.core_if.hprt0); 737 val.d32 [all...] |
/netgear-R7800-V1.0.2.28/target/linux/ramips/files/drivers/usb/dwc_otg/ |
H A D | dwc_otg_cil_intr.c | 69 gintsts.d32 = 0; 71 dwc_write_reg32 (&core_if->core_global_regs->gintsts, gintsts.d32); 173 gotgint.d32 = dwc_read_reg32(&global_regs->gotgint); 174 gotgctl.d32 = dwc_read_reg32(&global_regs->gotgctl); 175 DWC_DEBUGPL(DBG_CIL, "gotgctl=%08x\n", gotgctl.d32); 181 gotgctl.d32 = dwc_read_reg32(&global_regs->gotgctl); 200 gotgctl.d32 = 0; 203 gotgctl.d32, 0); 208 gotgctl.d32 = dwc_read_reg32(&global_regs->gotgctl); 217 gotgctl.d32 [all...] |
H A D | dwc_otg_hcd.c | 130 hprt0.d32 = dwc_otg_read_hprt0(core_if); 132 dwc_write_reg32(core_if->host_if->hprt0, hprt0.d32); 247 intr.d32 = 0; 251 dwc_modify_reg32(&dwc_otg_hcd->core_if->core_global_regs->gintmsk, intr.d32, 0); 252 dwc_modify_reg32(&dwc_otg_hcd->core_if->core_global_regs->gintsts, intr.d32, 0); 263 hprt0_data_t hprt0 = { .d32=0 }; 266 dwc_write_reg32(dwc_otg_hcd->core_if->host_if->hprt0, hprt0.d32); 291 hcchar.d32 = dwc_read_reg32(&hc_regs->hcchar); 296 dwc_write_reg32(&hc_regs->hcchar, hcchar.d32); 306 hcchar.d32 [all...] |
H A D | dwc_otg_regs.h | 155 * fields then write the <i>d32</i> value to the register. 160 uint32_t d32; member in union:gotgctl_data 183 * (GOTGINT). Set/clear the bits using the bit fields then write the <i>d32</i> 189 uint32_t d32; member in union:gotgint_data 224 * write the <i>d32</i> value to the register. 229 uint32_t d32; member in union:gahbcfg_data 257 * the <i>d32</i> value to the register. 262 uint32_t d32; member in union:gusbcfg_data 293 * <i>d32</i> value to the register. 298 uint32_t d32; member in union:grstctl_data 425 uint32_t d32; member in union:gintmsk_data 470 uint32_t d32; member in union:gintsts_data 519 uint32_t d32; member in union:device_grxsts_data 547 uint32_t d32; member in union:host_grxsts_data 573 uint32_t d32; member in union:fifosize_data 591 uint32_t d32; member in union:gnptxsts_data 623 uint32_t d32; member in union:dtxfsts_data 640 uint32_t d32; member in union:gi2cctl_data 665 uint32_t d32; member in union:hwcfg1_data 696 uint32_t d32; member in union:hwcfg2_data 740 uint32_t d32; member in union:hwcfg3_data 766 uint32_t d32; member in union:hwcfg4_data 860 uint32_t d32; member in union:dcfg_data 896 uint32_t d32; member in union:dctl_data 942 uint32_t d32; member in union:dsts_data 974 uint32_t d32; member in union:diepint_data 1024 uint32_t d32; member in union:doepint_data 1078 uint32_t d32; member in union:daint_data 1135 uint32_t d32; member in union:dtknq1_data 1158 uint32_t d32; member in union:dthrctl_data 1260 uint32_t d32; member in union:depctl_data 1361 uint32_t d32; member in union:deptsiz_data 1382 uint32_t d32; member in union:deptsiz0_data 1428 uint32_t d32; member in union:desc_sts_data 1615 uint32_t d32; member in union:hcfg_data 1638 uint32_t d32; member in union:hfir_data 1655 uint32_t d32; member in union:hfnum_data 1669 uint32_t d32; member in union:hptxsts_data 1701 uint32_t d32; member in union:hprt0_data 1733 uint32_t d32; member in union:haint_data 1770 uint32_t d32; member in union:haintmsk_data 1830 uint32_t d32; member in union:hcchar_data 1875 uint32_t d32; member in union:hcsplt_data 1912 uint32_t d32; member in union:hcint_data 1952 uint32_t d32; member in union:hctsiz_data 1991 uint32_t d32; member in union:hcintmsk_data 2054 uint32_t d32; member in union:pcgcctl_data [all...] |
H A D | dwc_otg_cil.c | 187 core_if->hwcfg1.d32 = dwc_read_reg32(&core_if->core_global_regs->ghwcfg1); 188 core_if->hwcfg2.d32 = dwc_read_reg32(&core_if->core_global_regs->ghwcfg2); 189 core_if->hwcfg3.d32 = dwc_read_reg32(&core_if->core_global_regs->ghwcfg3); 190 core_if->hwcfg4.d32 = dwc_read_reg32(&core_if->core_global_regs->ghwcfg4); 192 DWC_DEBUGPL(DBG_CILV,"hwcfg1=%08x\n",core_if->hwcfg1.d32); 193 DWC_DEBUGPL(DBG_CILV,"hwcfg2=%08x\n",core_if->hwcfg2.d32); 194 DWC_DEBUGPL(DBG_CILV,"hwcfg3=%08x\n",core_if->hwcfg3.d32); 195 DWC_DEBUGPL(DBG_CILV,"hwcfg4=%08x\n",core_if->hwcfg4.d32); 197 core_if->hcfg.d32 = dwc_read_reg32(&core_if->host_if->host_global_regs->hcfg); 198 core_if->dcfg.d32 [all...] |
H A D | dwc_otg_pcd_intr.c | 212 gintsts.d32 = 0; 214 dwc_write_reg32 (&core_if->core_global_regs->gintsts, gintsts.d32); 241 gintmsk_data_t gintmask = {.d32=0}; 252 dwc_modify_reg32(&global_regs->gintmsk, gintmask.d32, 0); 255 status.d32 = dwc_read_reg32(&global_regs->grxstsp); 289 dwc_otg_read_setup_packet(core_if, pcd->setup_pkt->d32); 308 dwc_modify_reg32(&global_regs->gintmsk, 0, gintmask.d32); 310 gintsts.d32 = 0; 312 dwc_write_reg32 (&global_regs->gintsts, gintsts.d32); 362 dtknqr1.d32 [all...] |
H A D | dwc_otg_hcd_intr.c | 58 gintsts.d32 = dwc_otg_read_core_intr(core_if); 59 if (!gintsts.d32) { 66 if (gintsts.d32 != DWC_SOF_INTR_MASK) 73 if (gintsts.d32 != DWC_SOF_INTR_MASK) 75 DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD Interrupt Detected gintsts&gintmsk=0x%08x\n", gintsts.d32); 105 if (gintsts.d32 != DWC_SOF_INTR_MASK) 118 if (gintsts.d32 != DWC_SOF_INTR_MASK) 175 gintsts_data_t gintsts = {.d32 = 0}; 177 hfnum.d32 = dwc_read_reg32(&hcd->core_if->host_if->host_global_regs->hfnum); 214 dwc_write_reg32(&hcd->core_if->core_global_regs->gintsts, gintsts.d32); [all...] |
H A D | dwc_otg_pcd.c | 691 diepmsk_data_t diepmsk = { .d32 = 0}; 695 0, diepmsk.d32); 697 dwc_modify_reg32(&GET_CORE_IF(pcd)->dev_if->dev_global_regs->diepmsk, 0, diepmsk.d32); 807 txfifosize.d32 = dwc_read_reg32(&ep->pcd->otg_dev->core_if->core_global_regs->dptxfsiz_dieptxf[ep->dwc_ep.tx_fifo_num]); 808 txstatus.d32 = dwc_read_reg32(&ep->pcd->otg_dev->core_if->dev_if->in_ep_regs[ep->dwc_ep.num]->dtxfsts); 875 dsts_data_t dsts = { .d32 = 0}; 876 depctl_data_t depctl = { .d32 = 0 }; 893 dsts.d32 = dwc_read_reg32(&core_if->dev_if->dev_global_regs->dsts); 897 desc_sts_data_t sts = { .d32 =0 }; 931 writel(sts.d32, [all...] |
H A D | dwc_otg_attr.c | 539 val.d32 = dwc_read_reg32 (&(otg_dev->core_if->core_global_regs->gotgctl)); 558 mem.d32 = dwc_read_reg32(addr); 560 dev_dbg(_dev, "Storing Address=0x%08x Data=0x%08x\n", (uint32_t)addr, mem.d32); 561 dwc_write_reg32(addr, mem.d32); 582 val.d32 = dwc_read_reg32 (&(otg_dev->core_if->core_global_regs->gotgctl)); 625 val.d32 = dwc_read_reg32 (otg_dev->core_if->host_if->hprt0); 646 mem.d32 = dwc_read_reg32(addr); 649 //dev_dbg(_dev, "Storing Address=0x%08x Data=0x%08x\n", (uint32_t)addr, mem.d32); 650 dwc_write_reg32(addr, mem.d32); 671 val.d32 [all...] |
H A D | dwc_otg_cil.h | 893 hprt0.d32 = dwc_read_reg32(_core_if->host_if->hprt0); 898 return hprt0.d32; 1011 doepmsk_data_t msk = { .d32 = 0 }; 1014 msk.d32 = dwc_read_reg32(&dev_if->dev_global_regs->doepeachintmsk[_ep->num]); 1018 v = dwc_read_reg32( &dev_if->out_ep_regs[_ep->num]->doepint) & msk.d32; 1020 msk.d32 = dwc_read_reg32(&dev_if->dev_global_regs->doepmsk); 1024 v = dwc_read_reg32( &dev_if->out_ep_regs[_ep->num]->doepint) & msk.d32;
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H A D | dwc_otg_pcd.h | 183 uint32_t d32[2]; member in union:dwc_otg_pcd::__anon720
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/netgear-R7800-V1.0.2.28/target/linux/lantiq/files/drivers/usb/dwc_otg/ |
H A D | dwc_otg_cil_intr.c | 69 gintsts.d32 = 0; 71 dwc_write_reg32 (&_core_if->core_global_regs->gintsts, gintsts.d32); 173 gotgint.d32 = dwc_read_reg32( &global_regs->gotgint); 174 gotgctl.d32 = dwc_read_reg32( &global_regs->gotgctl); 175 DWC_DEBUGPL(DBG_CIL, "++OTG Interrupt gotgint=%0x [%s]\n", gotgint.d32, 177 //DWC_DEBUGPL(DBG_CIL, "gotgctl=%08x\n", gotgctl.d32 ); 183 gotgctl.d32 = dwc_read_reg32( &global_regs->gotgctl); 202 gotgctl.d32 = 0; 205 gotgctl.d32, 0); 210 gotgctl.d32 [all...] |
H A D | dwc_otg_hcd.c | 122 hprt0.d32 = dwc_otg_read_hprt0 (core_if); 124 dwc_write_reg32(core_if->host_if->hprt0, hprt0.d32); 231 intr.d32 = 0; 235 dwc_modify_reg32 (&dwc_otg_hcd->core_if->core_global_regs->gintmsk, intr.d32, 0); 236 dwc_modify_reg32 (&dwc_otg_hcd->core_if->core_global_regs->gintsts, intr.d32, 0); 247 hprt0_data_t hprt0 = { .d32=0 }; 250 dwc_write_reg32(dwc_otg_hcd->core_if->host_if->hprt0, hprt0.d32); 275 hcchar.d32 = dwc_read_reg32(&hc_regs->hcchar); 280 dwc_write_reg32(&hc_regs->hcchar, hcchar.d32); 290 hcchar.d32 [all...] |
H A D | dwc_otg_regs.h | 148 * fields then write the <i>d32</i> value to the register. 153 uint32_t d32; member in union:gotgctl_data 176 * (GOTGINT). Set/clear the bits using the bit fields then write the <i>d32</i> 182 uint32_t d32; member in union:gotgint_data 211 * write the <i>d32</i> value to the register. 216 uint32_t d32; member in union:gahbcfg_data 243 * the <i>d32</i> value to the register. 248 uint32_t d32; member in union:gusbcfg_data 280 * <i>d32</i> value to the register. 285 uint32_t d32; member in union:grstctl_data 411 uint32_t d32; member in union:gintmsk_data 456 uint32_t d32; member in union:gintsts_data 504 uint32_t d32; member in union:device_grxsts_data 529 uint32_t d32; member in union:host_grxsts_data 551 uint32_t d32; member in union:fifosize_data 567 uint32_t d32; member in union:gnptxsts_data 599 uint32_t d32; member in union:dtxfsts_data 614 uint32_t d32; member in union:gi2cctl_data 637 uint32_t d32; member in union:hwcfg1_data 667 uint32_t d32; member in union:hwcfg2_data 707 uint32_t d32; member in union:hwcfg3_data 732 uint32_t d32; member in union:hwcfg4_data 813 uint32_t d32; member in union:dcfg_data 845 uint32_t d32; member in union:dctl_data 880 uint32_t d32; member in union:dsts_data 911 uint32_t d32; member in union:diepint_data 950 uint32_t d32; member in union:doepint_data 982 uint32_t d32; member in union:daint_data 1037 uint32_t d32; member in union:dtknq1_data 1059 uint32_t d32; member in union:dthrctl_data 1158 uint32_t d32; member in union:depctl_data 1248 uint32_t d32; member in union:deptsiz_data 1269 uint32_t d32; member in union:deptsiz0_data 1349 uint32_t d32; member in union:pcgcctl_data 1401 uint32_t d32; member in union:hcfg_data 1424 uint32_t d32; member in union:hfir_data 1440 uint32_t d32; member in union:hfnum_data 1453 uint32_t d32; member in union:hptxsts_data 1484 uint32_t d32; member in union:hprt0_data 1515 uint32_t d32; member in union:haint_data 1549 uint32_t d32; member in union:haintmsk_data 1606 uint32_t d32; member in union:hcchar_data 1640 uint32_t d32; member in union:hcsplt_data 1671 uint32_t d32; member in union:hcint_data 1710 uint32_t d32; member in union:hctsiz_data 1745 uint32_t d32; member in union:hcintmsk_data [all...] |
H A D | dwc_otg_cil.c | 172 core_if->hwcfg1.d32 = dwc_read_reg32(&core_if->core_global_regs->ghwcfg1); 173 core_if->hwcfg2.d32 = dwc_read_reg32(&core_if->core_global_regs->ghwcfg2); 174 core_if->hwcfg3.d32 = dwc_read_reg32(&core_if->core_global_regs->ghwcfg3); 175 core_if->hwcfg4.d32 = dwc_read_reg32(&core_if->core_global_regs->ghwcfg4); 177 DWC_DEBUGPL(DBG_CILV,"hwcfg1=%08x\n",core_if->hwcfg1.d32); 178 DWC_DEBUGPL(DBG_CILV,"hwcfg2=%08x\n",core_if->hwcfg2.d32); 179 DWC_DEBUGPL(DBG_CILV,"hwcfg3=%08x\n",core_if->hwcfg3.d32); 180 DWC_DEBUGPL(DBG_CILV,"hwcfg4=%08x\n",core_if->hwcfg4.d32); 232 gahbcfg_data_t ahbcfg = { .d32 = 0}; 234 dwc_modify_reg32(&_core_if->core_global_regs->gahbcfg, 0, ahbcfg.d32); [all...] |
H A D | dwc_otg_hcd_intr.c | 60 gintsts.d32 = dwc_otg_read_core_intr(core_if); 61 if (!gintsts.d32) { 68 if (gintsts.d32 != DWC_SOF_INTR_MASK) 75 if (gintsts.d32 != DWC_SOF_INTR_MASK) 77 DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD Interrupt Detected gintsts&gintmsk=0x%08x\n", gintsts.d32); 103 if (gintsts.d32 != DWC_SOF_INTR_MASK) 116 if (gintsts.d32 != DWC_SOF_INTR_MASK) 170 gintsts_data_t gintsts = {.d32 = 0}; 172 hfnum.d32 = dwc_read_reg32(&_hcd->core_if->host_if->host_global_regs->hfnum); 210 dwc_write_reg32(&_hcd->core_if->core_global_regs->gintsts, gintsts.d32); [all...] |
H A D | dwc_otg_attr.c | 457 val.d32 = dwc_read_reg32 (&(otg_dev->core_if->core_global_regs->gotgctl)); 471 mem.d32 = dwc_read_reg32(addr); 473 dev_dbg(_dev, "Storing Address=0x%08x Data=0x%08x\n", (uint32_t)addr, mem.d32); 474 dwc_write_reg32(addr, mem.d32); 490 val.d32 = dwc_read_reg32 (&(otg_dev->core_if->core_global_regs->gotgctl)); 521 val.d32 = dwc_read_reg32 (otg_dev->core_if->host_if->hprt0); 537 mem.d32 = dwc_read_reg32(addr); 540 //dev_dbg(_dev, "Storing Address=0x%08x Data=0x%08x\n", (uint32_t)addr, mem.d32); 541 dwc_write_reg32(addr, mem.d32); 557 val.d32 [all...] |
H A D | dwc_otg_cil.h | 728 hprt0.d32 = dwc_read_reg32(_core_if->host_if->hprt0); 733 return hprt0.d32; 764 gnptxsts_data_t txstatus = {.d32 = 0}; 766 txstatus.d32 = dwc_read_reg32(&_core_if->core_global_regs->gnptxsts);
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