/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/video/omap2/displays/ |
H A D | panel-generic.c | 70 dssdev->panel.timings = generic_panel_timings; 120 struct omap_video_timings *timings) 122 dpi_set_timings(dssdev, timings); 126 struct omap_video_timings *timings) 128 *timings = dssdev->panel.timings; 132 struct omap_video_timings *timings) 134 return dpi_check_timings(dssdev, timings); 119 generic_panel_set_timings(struct omap_dss_device *dssdev, struct omap_video_timings *timings) argument 125 generic_panel_get_timings(struct omap_dss_device *dssdev, struct omap_video_timings *timings) argument 131 generic_panel_check_timings(struct omap_dss_device *dssdev, struct omap_video_timings *timings) argument
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/video/ |
H A D | fbmon.c | 226 printk("fbmon: trying to fix monitor timings\n"); 1117 static void fb_timings_vfreq(struct __fb_timings *timings) argument 1119 timings->hfreq = fb_get_hfreq(timings->vfreq, timings->vactive); 1120 timings->vblank = fb_get_vblank(timings->hfreq); 1121 timings->vtotal = timings->vactive + timings 1128 fb_timings_hfreq(struct __fb_timings *timings) argument 1139 fb_timings_dclk(struct __fb_timings *timings) argument 1186 struct __fb_timings *timings; local [all...] |
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/ide/ |
H A D | cs5536.c | 119 unsigned long timings = (unsigned long)ide_get_drivedata(drive); local 127 timings &= (IDE_DRV_MASK << 8); 128 timings |= drv_timings[pio]; 129 ide_set_drivedata(drive, (void *)timings); 162 unsigned long timings = (unsigned long)ide_get_drivedata(drive); local 173 timings &= IDE_DRV_MASK; 174 timings |= mwdma_timings[mode - XFER_MW_DMA_0] << 8; 175 ide_set_drivedata(drive, (void *)timings); 183 unsigned long timings = (unsigned long)ide_get_drivedata(drive); local 186 (timings >> 195 unsigned long timings = (unsigned long)ide_get_drivedata(drive); local [all...] |
H A D | cs5530.c | 27 * Here are the standard PIO mode 0-4 timings for each "format". 28 * Format-0 uses fast data reg timings, with slower command reg timings. 29 * Format-1 uses fast timings for all registers, but won't work with all drives. 37 * After chip reset, the PIO timings are set to 0x0000e132, which is not valid. 39 #define CS5530_BAD_PIO(timings) (((timings)&~0x80000000)==0x0000e132) 50 * will have valid default PIO timings set up before we get here. 71 * different timings can still be chosen for each drive. We could 106 unsigned int reg, timings local [all...] |
H A D | pmac.c | 64 u32 timings[4]; member in struct:pmac_ide_hwif 137 * The "PIO" register controls PIO and MDMA timings, the "ULTRA" 138 * register controls the UDMA timings. At least, it seems bit 0 193 * is used to reach long timings used in this mode. 221 /* Rounded Multiword DMA timings 272 /* KeyLargo ATA-4 Ultra DMA timings (rounded) */ 286 /* UniNorth 2 ATA/100 timings */ 411 * Apply the timings of the proper unit (master/slave) to the shared 422 writel(pmif->timings[1], PMAC_IDE_REG(IDE_TIMING_CONFIG)); 424 writel(pmif->timings[ 506 u32 *timings, t; local 584 set_timings_udma_ata4(u32 *timings, u8 speed) argument 648 set_timings_mdma(ide_drive_t *drive, int intf_type, u32 *timings, u32 *timings2, u8 speed) argument 786 u32 *timings, *timings2, tl[2]; local [all...] |
H A D | sl82c105.c | 40 * for the interface. This has protection against runaway timings. 69 unsigned long timings = (unsigned long)ide_get_drivedata(drive); local 77 * Store the PIO timings so that we can restore them 80 timings &= 0xffff0000; 81 timings |= drv_ctrl; 82 ide_set_drivedata(drive, (void *)timings); 98 unsigned long timings = (unsigned long)ide_get_drivedata(drive); local 105 * Store the DMA timings so that we can actually program 108 timings &= 0x0000ffff; 109 timings | [all...] |
H A D | cs5535.c | 50 /* Format I PIO settings. We separate out cmd and data for safer timings */ 66 #define CS5535_BAD_PIO(timings) ( (timings&~0x80000000UL) == 0x00009172 ) 67 #define CS5535_BAD_DMA(timings) ( (timings & 0x000FFFFF) == 0x00077771 ) 81 /* Set the PIO timings */ 110 /* Set bit 31 of the DMA register for PIO format 1 timings */
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H A D | sc1200.c | 44 * have the register with the fast PCI bus timings. 66 * Here are the standard PIO mode 0-4 timings for each "format". 67 * Format-0 uses fast data reg timings, with slower command reg timings. 68 * Format-1 uses fast timings for all registers, but won't work with all drives. 77 * After chip reset, the PIO timings are set to 0x00009172, which is not valid. 79 //#define SC1200_BAD_PIO(timings) (((timings)&~0x80000000)==0x00009172) 98 * different timings can still be chosen for each drive. We could 129 unsigned int reg, timings; local [all...] |
H A D | it8213.c | 39 static const u8 timings[][2] = { local 62 slave_data = slave_data | (timings[pio][0] << 2) | timings[pio][1]; 67 master_data = master_data | (timings[pio][0] << 12) | (timings[pio][1] << 8);
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H A D | slc90e66.c | 34 static const u8 timings[][2] = { local 59 slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << 67 master_data |= (timings[pio][0] << 12) | (timings[pio][1] << 8);
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/ata/ |
H A D | pata_cs5535.c | 70 #define CS5535_BAD_PIO(timings) ( (timings&~0x80000000UL)==0x00009172 ) 191 u32 timings, dummy; local 194 timings for PIO0 */ 195 rdmsr(ATAC_CH0D0_PIO, timings, dummy); 196 if (CS5535_BAD_PIO(timings)) 198 rdmsr(ATAC_CH0D1_PIO, timings, dummy); 199 if (CS5535_BAD_PIO(timings))
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H A D | pata_efar.c | 74 * efar_set_piomode - Initialize host controller PATA PIO timings 75 * @ap: Port whose timings we are configuring 100 u8 timings[][2] = { { 0, 0 }, local 122 idetm_data |= (timings[pio][0] << 12) | 123 (timings[pio][1] << 8); 134 slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << shift; 148 * efar_set_dmamode - Initialize host controller PATA DMA timings 149 * @ap: Port whose timings we are configuring 169 u8 timings[][ local [all...] |
H A D | pata_it8213.c | 65 * it8213_set_piomode - Initialize host controller PATA PIO timings 66 * @ap: Port whose timings we are configuring 67 * @adev: Device whose timings we are configuring 89 u8 timings[][2] = { { 0, 0 }, local 109 idetm_data |= (timings[pio][0] << 12) | 110 (timings[pio][1] << 8); 120 slave_data |= (timings[pio][0] << 2) | timings[pio][1]; 129 * it8213_set_dmamode - Initialize host controller PATA DMA timings 130 * @ap: Port whose timings w 149 u8 timings[][2] = { { 0, 0 }, local [all...] |
H A D | pata_rdc.c | 90 * rdc_set_piomode - Initialize host controller PATA PIO timings 91 * @ap: Port whose timings we are configuring 113 u8 timings[][2] = { { 0, 0 }, local 142 slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) 151 (timings[pio][0] << 12) | 152 (timings[pio][1] << 8); 167 * rdc_set_dmamode - Initialize host controller PATA PIO timings 168 * @ap: Port whose timings we are configuring 187 u8 timings[][ local [all...] |
H A D | pata_oldpiix.c | 11 * does drive selection and we use this to reload the timings. 54 * oldpiix_set_piomode - Initialize host controller PATA PIO timings 55 * @ap: Port whose timings we are configuring 56 * @adev: Device whose timings we are configuring 79 u8 timings[][2] = { { 0, 0 }, local 107 idetm_data |= (timings[pio][0] << 12) | 108 (timings[pio][1] << 8); 116 * oldpiix_set_dmamode - Initialize host controller PATA DMA timings 117 * @ap: Port whose timings we are configuring 133 u8 timings[][ local [all...] |
H A D | pata_radisys.c | 9 * slave timings, SITRE or PPE. In that sense it is a close relative 11 * although no other modes/timings. Also lacking is 32bit I/O on the ATA 30 * radisys_set_piomode - Initialize host controller PATA PIO timings 32 * @adev: Device whose timings we are configuring 55 u8 timings[][2] = { { 0, 0 }, /* Check me */ local 72 idetm_data |= (timings[pio][0] << 12) | 73 (timings[pio][1] << 8); 81 * radisys_set_dmamode - Initialize host controller PATA DMA timings 82 * @ap: Port whose timings we are configuring 98 u8 timings[][ local [all...] |
H A D | pata_sc1200.c | 112 * We cannot mix MWDMA and UDMA without reloading timings each switch 142 u32 timings; local 144 pci_read_config_dword(pdev, reg + 4, &timings); 145 timings &= 0x80000000UL; 146 timings |= format; 147 pci_write_config_dword(pdev, reg + 4, timings); 157 * this interface so that we can load the correct ATA timings if
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/video/omap2/dss/ |
H A D | dpi.c | 101 struct omap_video_timings *t = &dssdev->panel.timings; 231 struct omap_video_timings *timings) 234 dssdev->panel.timings = *timings; 243 struct omap_video_timings *timings) 251 if (!dispc_lcd_timings_ok(timings)) 254 if (timings->pixel_clock == 0) 264 timings->pixel_clock * 1000, 278 r = dss_calc_clock_div(is_tft, timings->pixel_clock * 1000, 292 timings 230 dpi_set_timings(struct omap_dss_device *dssdev, struct omap_video_timings *timings) argument 242 dpi_check_timings(struct omap_dss_device *dssdev, struct omap_video_timings *timings) argument [all...] |
H A D | venc.c | 392 struct omap_video_timings *timings) 394 if (memcmp(&omap_dss_pal_timings, timings, sizeof(*timings)) == 0) 397 if (memcmp(&omap_dss_ntsc_timings, timings, sizeof(*timings)) == 0) 410 venc_write_config(venc_timings_to_config(&dssdev->panel.timings)); 427 dispc_set_digit_size(dssdev->panel.timings.x_res, 428 dssdev->panel.timings.y_res/2); 460 dssdev->panel.timings = omap_dss_pal_timings; 548 struct omap_video_timings *timings) 391 venc_timings_to_config( struct omap_video_timings *timings) argument 547 venc_get_timings(struct omap_dss_device *dssdev, struct omap_video_timings *timings) argument 553 venc_set_timings(struct omap_dss_device *dssdev, struct omap_video_timings *timings) argument 570 venc_check_timings(struct omap_dss_device *dssdev, struct omap_video_timings *timings) argument [all...] |
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/plat-s3c24xx/include/plat/ |
H A D | cpu-freq-core.h | 22 * struct s3c2410_iobank_timing - IO bank timings for S3C2410 style timings 32 * This structure represents the IO timings for a S3C2410 style IO bank 48 * struct s3c2412_iobank_timing - io timings for PL092 (S3C2412) style IO 88 * struct s3c_iotimings - Chip IO timings holder 89 * @bank: The timings for each IO bank. 144 * @set_iotiming: Update the IO timings from the cached copies calculated 146 * @calc_iotiming: Calculate and update the cached copies of the IO timings 174 struct s3c_iotimings *timings); 177 struct s3c_iotimings *timings); [all...] |
/netgear-R7000-V1.0.7.12_1.2.5/ap/gpl/openssl/crypto/ec/ |
H A D | ectest.c | 118 static void timings(EC_GROUP *group, int type, BN_CTX *ctx) 958 timings(P_160, TIMING_BASE_PT, ctx); 959 timings(P_160, TIMING_RAND_PT, ctx); 960 timings(P_160, TIMING_SIMUL, ctx); 961 timings(P_192, TIMING_BASE_PT, ctx); 962 timings(P_192, TIMING_RAND_PT, ctx); 963 timings(P_192, TIMING_SIMUL, ctx); 964 timings(P_224, TIMING_BASE_PT, ctx); 965 timings(P_224, TIMING_RAND_PT, ctx); 966 timings(P_22 [all...] |
/netgear-R7000-V1.0.7.12_1.2.5/ap/gpl/openssl-1.0.2h/crypto/ec/ |
H A D | ectest.c | 118 static void timings(EC_GROUP *group, int type, BN_CTX *ctx) 958 timings(P_160, TIMING_BASE_PT, ctx); 959 timings(P_160, TIMING_RAND_PT, ctx); 960 timings(P_160, TIMING_SIMUL, ctx); 961 timings(P_192, TIMING_BASE_PT, ctx); 962 timings(P_192, TIMING_RAND_PT, ctx); 963 timings(P_192, TIMING_SIMUL, ctx); 964 timings(P_224, TIMING_BASE_PT, ctx); 965 timings(P_224, TIMING_RAND_PT, ctx); 966 timings(P_22 [all...] |
/netgear-R7000-V1.0.7.12_1.2.5/ap/gpl/timemachine/openssl-0.9.8e/test/ |
H A D | ectest.c | 119 static void timings(EC_GROUP *group, int type, BN_CTX *ctx) 715 timings(P_160, TIMING_BASE_PT, ctx); 716 timings(P_160, TIMING_RAND_PT, ctx); 717 timings(P_160, TIMING_SIMUL, ctx); 718 timings(P_192, TIMING_BASE_PT, ctx); 719 timings(P_192, TIMING_RAND_PT, ctx); 720 timings(P_192, TIMING_SIMUL, ctx); 721 timings(P_224, TIMING_BASE_PT, ctx); 722 timings(P_224, TIMING_RAND_PT, ctx); 723 timings(P_22 [all...] |
/netgear-R7000-V1.0.7.12_1.2.5/ap/gpl/timemachine/openssl-0.9.8e/crypto/ec/ |
H A D | ectest.c | 119 static void timings(EC_GROUP *group, int type, BN_CTX *ctx) 715 timings(P_160, TIMING_BASE_PT, ctx); 716 timings(P_160, TIMING_RAND_PT, ctx); 717 timings(P_160, TIMING_SIMUL, ctx); 718 timings(P_192, TIMING_BASE_PT, ctx); 719 timings(P_192, TIMING_RAND_PT, ctx); 720 timings(P_192, TIMING_SIMUL, ctx); 721 timings(P_224, TIMING_BASE_PT, ctx); 722 timings(P_224, TIMING_RAND_PT, ctx); 723 timings(P_22 [all...] |
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/plat-s3c24xx/ |
H A D | s3c2410-iotiming.c | 33 * @timings: The timing inforamtion to print. 36 struct s3c_iotimings *timings) 42 bt = timings->bank[bank].io_2410; 395 * s3c2410_iotiming_set - set the IO timings from the given setup. 409 /* set the io timings from the specifier */ 423 * @timings: The IO timing information to fill out. 425 * Calculate the @timings timing information from the current frequency 432 * if the timings are correct on initialisation. 436 struct s3c_iotimings *timings) 470 timings 35 s3c2410_print_timing(const char *pfx, struct s3c_iotimings *timings) argument 435 s3c2410_iotiming_get(struct s3c_cpufreq_config *cfg, struct s3c_iotimings *timings) argument [all...] |