Searched refs:reassign (Results 1 - 12 of 12) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/gpu/drm/nouveau/
H A Dnv04_fifo.c68 uint32_t reassign = nv_rd32(dev, NV03_PFIFO_CACHES); local
71 return (reassign == 1);
295 pfifo->reassign(dev, true);
H A Dnouveau_channel.c212 pfifo->reassign(dev, false);
228 pfifo->reassign(dev, true);
282 pfifo->reassign(dev, false);
306 pfifo->reassign(dev, true);
H A Dnouveau_state.c80 engine->fifo.reassign = nv04_fifo_reassign;
132 engine->fifo.reassign = nv04_fifo_reassign;
184 engine->fifo.reassign = nv04_fifo_reassign;
236 engine->fifo.reassign = nv04_fifo_reassign;
289 engine->fifo.reassign = nv04_fifo_reassign;
345 engine->fifo.reassign = nv04_fifo_reassign;
393 engine->fifo.reassign = nvc0_fifo_reassign;
H A Dnouveau_drv.c201 pfifo->reassign(dev, false);
236 pfifo->reassign(dev, true);
H A Dnouveau_mem.c60 pfifo->reassign(dev, false);
70 pfifo->reassign(dev, true);
H A Dnv10_fifo.c239 pfifo->reassign(dev, true);
H A Dnouveau_irq.c139 uint32_t status, reassign; local
142 reassign = nv_rd32(dev, NV03_PFIFO_CACHES) & 1;
237 nv_wr32(dev, NV03_PFIFO_CACHES, reassign);
H A Dnv40_fifo.c296 pfifo->reassign(dev, true);
H A Dnv50_fifo.c190 dev_priv->engine.fifo.reassign(dev, true);
H A Dnouveau_drv.h306 bool (*reassign)(struct drm_device *, bool enable); member in struct:nouveau_fifo_engine
/netgear-R7000-V1.0.7.12_1.2.5/ap/gpl/openssl/crypto/bn/asm/
H A Darmv4-gf2m.pl156 mov $ret,r0 @ reassign 1st argument
/netgear-R7000-V1.0.7.12_1.2.5/ap/gpl/openssl-1.0.2h/crypto/bn/asm/
H A Darmv4-gf2m.pl156 mov $ret,r0 @ reassign 1st argument

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