Searched refs:pll3_sw_clk (Results 1 - 1 of 1) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-mx5/
H A Dclock-mx51.c35 static struct clk pll3_sw_clk; variable in typeref:struct:clk
100 else if (pll == &pll3_sw_clk)
267 } else if (parent == &pll3_sw_clk) {
296 } else if (clk->parent == &pll3_sw_clk) {
350 mux = _get_mux(parent, &pll1_sw_clk, &pll3_sw_clk, &lp_apm_clk, NULL);
565 mux = _get_mux(parent, &pll1_sw_clk, &pll2_sw_clk, &pll3_sw_clk,
594 mux = _get_mux(parent, &pll1_sw_clk, &pll2_sw_clk, &pll3_sw_clk,
675 static struct clk pll3_sw_clk = { variable in typeref:struct:clk

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