Searched refs:pll2_sw_clk (Results 1 - 1 of 1) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-mx5/
H A Dclock-mx51.c34 static struct clk pll2_sw_clk; variable in typeref:struct:clk
98 else if (pll == &pll2_sw_clk)
265 } else if (parent == &pll2_sw_clk) {
293 if (clk->parent == &pll2_sw_clk) {
310 if (parent == &pll2_sw_clk)
379 if (parent == &pll2_sw_clk)
392 .parent = &pll2_sw_clk,
565 mux = _get_mux(parent, &pll1_sw_clk, &pll2_sw_clk, &pll3_sw_clk,
594 mux = _get_mux(parent, &pll1_sw_clk, &pll2_sw_clk, &pll3_sw_clk,
665 static struct clk pll2_sw_clk variable in typeref:struct:clk
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