Searched refs:pclk_sel_shift (Results 1 - 4 of 4) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/plat-spear/include/plat/
H A Dclock.h72 * @pclk_sel_shift: register shift for selecting parent of this clock
88 unsigned int pclk_sel_shift; member in struct:clk
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-spear6xx/
H A Dclock.c125 .pclk_sel_shift = UART_CLK_SHIFT,
135 .pclk_sel_shift = UART_CLK_SHIFT,
171 .pclk_sel_shift = FIRDA_CLK_SHIFT,
207 .pclk_sel_shift = CLCD_CLK_SHIFT,
242 .pclk_sel_shift = GPT0_CLK_SHIFT,
251 .pclk_sel_shift = GPT1_CLK_SHIFT,
266 .pclk_sel_shift = GPT2_CLK_SHIFT,
281 .pclk_sel_shift = GPT3_CLK_SHIFT,
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-spear3xx/
H A Dclock.c125 .pclk_sel_shift = UART_CLK_SHIFT,
161 .pclk_sel_shift = FIRDA_CLK_SHIFT,
196 .pclk_sel_shift = GPT0_CLK_SHIFT,
211 .pclk_sel_shift = GPT1_CLK_SHIFT,
226 .pclk_sel_shift = GPT2_CLK_SHIFT,
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/plat-spear/
H A Dclock.c178 val &= ~(clk->pclk_sel->pclk_sel_mask << clk->pclk_sel_shift);
179 val |= clk->pclk_sel->pclk_info[i].pclk_mask << clk->pclk_sel_shift;
249 mask = (readl(clk->pclk_sel->pclk_sel_reg) >> clk->pclk_sel_shift)

Completed in 64 milliseconds