Searched refs:pclk_sel_reg (Results 1 - 4 of 4) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/plat-spear/include/plat/
H A Dclock.h51 * @pclk_sel_reg: register for selecting a parent
57 unsigned int *pclk_sel_reg; member in struct:pclk_sel
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-spear6xx/
H A Dclock.c111 .pclk_sel_reg = PERIP_CLK_CFG,
162 .pclk_sel_reg = PERIP_CLK_CFG,
198 .pclk_sel_reg = PERIP_CLK_CFG,
229 .pclk_sel_reg = PERIP_CLK_CFG,
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-spear3xx/
H A Dclock.c116 .pclk_sel_reg = PERIP_CLK_CFG,
152 .pclk_sel_reg = PERIP_CLK_CFG,
183 .pclk_sel_reg = PERIP_CLK_CFG,
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/plat-spear/
H A Dclock.c177 val = readl(clk->pclk_sel->pclk_sel_reg);
180 writel(val, clk->pclk_sel->pclk_sel_reg);
249 mask = (readl(clk->pclk_sel->pclk_sel_reg) >> clk->pclk_sel_shift)

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