Searched refs:parent_switch_reg (Results 1 - 2 of 2) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-pnx4008/
H A Dclock.h29 u32 parent_switch_reg; member in struct:clk
H A Dclock.c115 tmp_reg = __raw_readl(clk->parent_switch_reg);
119 __raw_writel(tmp_reg, clk->parent_switch_reg);
121 while (i++ < 0xFFF && !(__raw_readl(clk->parent_switch_reg) & 1)) ; /*wait for 13'MHz selection status */
123 if (!(__raw_readl(clk->parent_switch_reg) & 1)) {
126 clk->name, __raw_readl(clk->parent_switch_reg));
148 tmp_reg = __raw_readl(clk->parent_switch_reg);
152 __raw_writel(tmp_reg, clk->parent_switch_reg);
154 while (i++ < 0xFFF && (__raw_readl(clk->parent_switch_reg) & 1)) ; /*wait for 13MHz selection status */
156 if (__raw_readl(clk->parent_switch_reg) & 1) {
159 clk->name, __raw_readl(clk->parent_switch_reg));
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