Searched refs:mpu_ck (Results 1 - 4 of 4) sorted by relevance
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-omap2/ |
H A D | clock.c | 441 struct clk *hfclkin_ck, *core_ck, *mpu_ck; local 444 mpu_ck = clk_get(NULL, mpu_ck_name); 445 if (WARN(IS_ERR(mpu_ck), "clock: failed to get %s.\n", mpu_ck_name)) 463 (clk_get_rate(mpu_ck) / 1000000));
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H A D | clock2420_data.c | 396 static struct clk mpu_ck = { /* Control cpu */ variable in typeref:struct:clk 397 .name = "mpu_ck", 1701 .parent = &mpu_ck, /* Indexed by mpu speed, no parent */ 1736 CLK(NULL, "mpu_ck", &mpu_ck, CK_242X), 1891 (dpll_ck.rate / 1000000), (mpu_ck.rate / 1000000)) ;
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H A D | clock2430_data.c | 378 static struct clk mpu_ck = { /* Control cpu */ variable in typeref:struct:clk 379 .name = "mpu_ck", 1780 .parent = &mpu_ck, /* Indexed by mpu speed, no parent */ 1813 CLK(NULL, "mpu_ck", &mpu_ck, CK_243X), 1980 (dpll_ck.rate / 1000000), (mpu_ck.rate / 1000000)) ;
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H A D | clock3xxx_data.c | 328 * bypass selection in mpu_ck 1073 static struct clk mpu_ck = { variable in typeref:struct:clk 1074 .name = "mpu_ck", 1081 /* arm_fck is divided by two when DPLL1 locked; otherwise, passthrough mpu_ck */ 1089 { .parent = &mpu_ck, .rates = arm_fck_rates }, 1096 .parent = &mpu_ck, 1113 .parent = &mpu_ck, 3214 CLK(NULL, "mpu_ck", &mpu_ck, CK_3XXX),
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