Searched refs:jz_clk_pll_half_get_rate (Results 1 - 1 of 1) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/mips/jz4740/
H A Dclock.c228 static unsigned long jz_clk_pll_half_get_rate(struct clk *clk) function
319 .get_rate = jz_clk_pll_half_get_rate,
516 unsigned long parent_rate = jz_clk_pll_half_get_rate(clk->parent);
537 div = jz_clk_pll_half_get_rate(clk->parent) / rate - 1;
556 return jz_clk_pll_half_get_rate(clk->parent) / (div + 1);

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